ISD94100 Series Technical Reference Manual
Sep 9, 2019
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System SRAM Parity Error Address Register (SYS_SRAM_ERRADDR)
Register
Offset
R/W Description
Reset Value
SYS_SRAM_ERRADDR
0xC8
R
System SRAM Parity Check Error Address Register
0x0000_0000
31
30
29
28
27
26
25
24
ERRADDR
23
22
21
20
19
18
17
16
ERRADDR
15
14
13
12
11
10
9
8
ERRADDR
7
6
5
4
3
2
1
0
ERRADDR
Bits
Description
[31:0]
ERRADDR
System SRAM Parity Error Address
This register shows system SRAM parity error byte address.
Содержание ISD94100 Series
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