ISD94100 Series Technical Reference Manual
Sep 9, 2019
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Rev1.09
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I2C Time-out Control Register (I2C_TOCTL)
Register
Offset
R/W Description
Reset Value
I2C_TOCTL
0x14
R/W I
2
C Time-out Control Register
0x0000_0000
31
30
29
28
27
26
25
24
Reserved
23
22
21
20
19
18
17
16
Reserved
15
14
13
12
11
10
9
8
Reserved
7
6
5
4
3
2
1
0
Reserved
TOCEN
TOCDIV4
TOIF
Bits
Description
[31:3]
Reserved
Reserved. Any values read should be ignored. When writing to this field always write with
reset value.
[2]
TOCEN
Time-out Counter Enable Bit
When Enabled, the 14-bit time-out counter will start counting when SI is clear. Setting flag
SI to ‘1’ will reset counter and re-start up counting after SI is cleared.
0 = Time-out counter Disabled.
1 = Time-out counter Enabled.
[1]
TOCDIV4
Time-out Counter Input Clock Divided by 4
When Enabled, The time-out period is extend 4 times.
0 = Time-out period is extend 4 times Disabled.
1 = Time-out period is extend 4 times Enabled.
[0]
TOIF
Time-out Flag
This bit is set by hardware when I
2
C time-out happened and it can interrupt CPU if I
2
C
interrupt enable bit (INTEN) is set to 1.
Note:
Software can write 1 to clear this bit.
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