ISD94100 Series Technical Reference Manual
Sep 9, 2019
Page
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Rev1.09
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Figure 6.2-1 System Reset Sources
There are a total of 9 reset sources in the ISD94100 series. In general, CPU reset is used to reset
Cortex
®
-M4 only; the other reset sources will reset Cortex
®
-M4 and all peripherals. However, there
are small differences between each reset source and they are listed in Table 6.2.2-1.
Reset Sources
Register
POR
NRESET
WDT
LVR
BOD
Lockup
CHIP
MCU
CPU
SYS_RSTSTS
Bit 0 = 1
Bit 1 = 1
Bit 2 = 1
Bit 3 = 1
Bit 4 = 1
Bit 8 = 1
Bit 0 = 1
Bit 5 = 1
Bit 7 =
1
CHIPRST
(SYS_IPRST0[0])
0x0
-
-
-
-
-
-
-
-
BODEN
(SYS_BODCTL[0])
Reload
from
CONFIG0
Reload
from
CONFIG0
Reload
from
CONFIG0
Reload
from
CONFIG0
-
Reload
from
CONFIG0
Reload
from
CONFIG0
Reload
from
CONFIG0
-
BODVL
(SYS_BODCTL[18:16])
BODRSTEN
(SYS_BODCTL[3])
HXTEN
(CLK_PWRCTL[0])
Reload
from
CONFIG0
Reload
from
CONFIG0
Reload
from
CONFIG0
Reload
from
CONFIG0
Reload
from
CONFIG0
Reload
from
CONFIG0
Reload
from
CONFIG0
Reload
from
CONFIG0
LXTEN
(CLK_PWRCTL[1])
0x0
-
-
-
-
-
-
-
-
WDTCKEN
(CLK_APBCLK0[0])
0x1
-
0x1
-
-
-
0x1
-
-
HCLKSEL
(CLK_CLKSEL0[2:0])
Reload
from
CONFIG0
Reload
from
CONFIG0
Reload
from
CONFIG0
Reload
from
CONFIG0
Reload
from
CONFIG0
Reload
from
CONFIG0
Reload
from
CONFIG0
Reload
from
CONFIG0
-
WDTSEL
(CLK_CLKSEL1[1:0])
0x3
0x3
-
-
-
-
-
-
-
HXTSTB
(CLK_STATUS[0])
0x0
-
-
-
-
-
-
-
-
LXTSTB
(CLK_STATUS[1])
0x0
-
-
-
-
-
-
-
-
PLLSTB
(CLK_STATUS[2])
0x0
-
-
-
-
-
-
-
-
HIRCSTB
(CLK_STATUS[4])
0x1
-
-
-
-
-
-
-
-
CLKSFAIL
(CLK_STATUS[7])
0x0
0x0
-
-
-
-
-
-
-
RSTEN
(WDT_CTL[1])
Reload
from
CONFIG0
Reload
from
CONFIG0
Reload
from
CONFIG0
Reload
from
CONFIG0
Reload
from
CONFIG0
-
Reload
from
CONFIG0
-
-
WDTEN
(WDT_CTL[7])
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