ISD94100 Series Technical Reference Manual
Sep 9, 2019
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NMI Source Interrupt Status Register (NMISTS)
Register
Offset
R/W Description
Reset Value
NMISTS
0x04
R
NMI source interrupt Status Register
0x0000_0000
31
30
29
28
27
26
25
24
Reserved
23
22
21
20
19
18
17
16
Reserved
15
14
13
12
11
10
9
8
Reserved
UART0_INT
EINT5
EINT4
EINT3
EINT2
EINT1
EINT0
7
6
5
4
3
2
1
0
Reserved
RTC_INT
Reserved
CLKFAIL
SRAM_PERR PWRWU_INT
IRC_INT
BODOUT
Bits
Description
[31:15]
Reserved
Reserved. Any values read should be ignored. When writing to this field always write with
reset value.
[14]
UART0_INT
UART0 Interrupt Flag (Read Only)
0 = UART0 interrupt is deasserted.
1 = UART0 interrupt is asserted.
[13]
EINT5
External Interrupt 5 Interrupt Flag (Read Only)
0 = External Interrupt 5 interrupt is deasserted.
1 = External Interrupt 5 interrupt is asserted.
[12]
EINT4
External Interrupt 4 Interrupt Flag (Read Only)
0 = External Interrupt 4 interrupt is deasserted.
1 = External Interrupt 4 interrupt is asserted.
[11]
EINT3
External Interrupt 3 Interrupt Flag (Read Only)
0 = External Interrupt 3 interrupt is deasserted.
1 = External Interrupt 3 interrupt is asserted.
[10]
EINT2
External Interrupt 2 Interrupt Flag (Read Only)
0 = External Interrupt 2 interrupt is deasserted.
1 = External Interrupt 2 interrupt is asserted.
[9]
EINT1
External Interrupt 1 Interrupt Flag (Read Only)
0 = External Interrupt 1 interrupt is deasserted.
1 = External Interrupt 1 interrupt is asserted.
[8]
EINT0
External Interrupt 0 Interrupt Flag (Read Only)
0 = External Interrupt 0 interrupt is deasserted.
1 = External Interrupt 0 interrupt is asserted.
[7]
Reserved
Reserved. Any values read should be ignored. When writing to this field always write with
reset value.
Содержание ISD94100 Series
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