ISD94100 Series Technical Reference Manual
Sep 9, 2019
Page
576
of 928
Rev1.09
IS
D
9
410
0
S
ER
IE
S
T
E
C
HN
ICA
L
RE
F
E
RE
NCE
M
AN
U
AL
nCTS Wake-up Case 1 (nCTS transition from low to high)
Power-down mode
HCLK
nCTS
CTSWKF
stable count
CPU run
CTSACTLV (UART_MODEMSTS[8]) = 0
Note:
Stable count means HCLK source recovery stable count.
Figure 6.12-5 UART nCTS Wake-up Case1
nCTS Wake-up Case 2 (nCTS transition from high to low)
Power-down mode
HCLK
nCTS
stable count
CPU run
CTSACTLV (UART_MODEM[8]) = 1
CTSWKF
Note:
Stable count means HCLK source recovery stable count.
Figure 6.12-6 UART nCTS Wake-up Case2
Incoming data wake-up:
When system is in Power-down mode and the WKDATEN (UART_WKCTL [1]) is set, toggling on
incoming data (UART0_RXD) pin wakes up the system, and DATWKF (UART_WKSTS[1]) will be
set to 1.
In order to correctly receive the incoming data after system wake-up, the Start bit Compensation
Value STCOMP (UART_DWKCOMP[15:0]) shall be set in advance. STCOMP bits indicate how
many UART0_CLK cycles the UART controller can have to become stable and be ready to receive
1
st
bit (start bit) after wakeup.
Note1:
The UART controller clock source should be selected from HIRC and the compensation
time for start bit is about 15.68us. It means that the value of STCOMP (UART_DWKCOMP[15:0])
can be set as 347.
Note2:
The value of BRD(UART_BAUD[15:0]) should be greater than STCOMP
(UART_DWKCOMP[15:0]).
Содержание ISD94100 Series
Страница 528: ...ISD94100 Series Technical Reference Manual Sep 9 2019 Page 528 of 928 Rev1 09 ISD94100 SERIES TECHNICAL REFERENCE MANUAL...
Страница 626: ...ISD94100 Series Technical Reference Manual Sep 9 2019 Page 626 of 928 Rev1 09 ISD94100 SERIES TECHNICAL REFERENCE MANUAL...
Страница 702: ...ISD94100 Series Technical Reference Manual Sep 9 2019 Page 702 of 928 Rev1 09 ISD94100 SERIES TECHNICAL REFERENCE MANUAL...
Страница 875: ...ISD94100 Series Technical Reference Manual Sep 9 2019 Page 875 of 928 Rev1 09 ISD94100 SERIES TECHNICAL REFERENCE MANUAL...