ISD94100 Series Technical Reference Manual
Sep 9, 2019
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Rev1.09
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PC Standby Power-down Wake-up Control Register
(CLK_PCSWKCTL)
Register
Offset
R/W Description
Reset Value
CLK_PCSWKCTL
0xA8
R/W GPC Standby Power-down Wakeup Control Register
0x0000_0000
31
30
29
28
27
26
25
24
Reserved
23
22
21
20
19
18
17
16
Reserved
15
14
13
12
11
10
9
8
Reserved
DBEN
7
6
5
4
3
2
1
0
WKPSEL
Reserved
PFWKEN
PRWKEN
WKEN
Bits
Description
[31:9]
Reserved
Reserved. Any values read should be ignored. When writing to this field always write with
reset value.
[8]
DBEN
PC Input Signal De-bounce Enable Bit
The DBEN bit is used to enable the de-bounce function for each corresponding I/O. If the
input signal pulse width cannot be sampled by continuous two de-bounce sample cycle, the
input signal transition is seen as the signal bounce and will not trigger the wakeup. The de-
bounce clock source is the internal low speed RC oscillator.
0 = Standby power-down wake-up pin De-bounce function disable.
1 = Standby power-down wake-up pin De-bounce function enable.
The de-bounce function is valid only for edge triggered.
[7:4]
WKPSEL
PC Standby Power-down Wake-up Pin Select
0000 = PC.0 wake-up function enabled.
0001 = PC.1 wake-up function enabled.
0010 = PC.2 wake-up function enabled.
0011 = PC.3 wake-up function enabled.
0100 = PC.4 wake-up function enabled.
0101 = PC.5 wake-up function enabled.
0110 = PC.6 wake-up function enabled.
0111 = PC.7 wake-up function enabled.
1000 = PC.8 wake-up function enabled.
1001 = PC.9 wake-up function enabled.
1010 = PC.10 wake-up function enabled.
1011 = PC.11 wake-up function enabled.
1100 = PC.12 wake-up function enabled.
1101 = PC.13 wake-up function enabled.
1110 = PC.14 wake-up function enabled.
Содержание ISD94100 Series
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