ISD94100 Series Technical Reference Manual
Sep 9, 2019
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[4]
CH4ZCEN
Channel4 Zero-cross Detect Enable Control
0 = channel4 zero-cross detect Disabled.
1 = channel4 zero-cross detect Enabled.
Note1:
This bit is available while multi-channel PCM mode and TDMCHNUM
(I2S_CTL0[31:30]) = 0x1, 0x2, 0x3.
Note2:
If this bit is set to 1, when channel4 data sign bit change or next shift data bits are
all zero then CH4ZCIF(I2S_STATUS1[4]) flag is set to 1.
Note3:
If CH4ZCIF Flag is set to 1, the channel4 will be mute.
[3]
CH3ZCEN
Channel3 Zero-cross Detect Enable Control
0 = channel3 zero-cross detect Disabled.
1 = channel3 zero-cross detect Enabled.
Note1:
This bit is available while multi-channel PCM mode and TDMCHNUM
(I2S_CTL0[31:30]) = 0x1, 0x2, 0x3.
Note2:
If this bit is set to 1, when channel3 data sign bit change or next shift data bits are
all zero then CH3ZCIF(I2S_STATUS1[3]) flag is set to 1.
Note3:
If CH3ZCIF Flag is set to 1, the channel3 will be mute.
[2]
CH2ZCEN
Channel2 Zero-cross Detect Enable Control
0 = channel2 zero-cross detect Disabled.
1 = channel2 zero-cross detect Enabled.
Note1:
This bit is available while multi-channel PCM mode and TDMCHNUM
(I2S_CTL0[31:30]) = 0x1, 0x2, 0x3.
Note2:
If this bit is set to 1, when channel2 data sign bit change or next shift data bits are
all zero then CH2ZCIF(I2S_STATUS1[2]) flag is set to 1.
Note3:
If CH2ZCIF Flag is set to 1, the channel2 will be mute.
[1]
CH1ZCEN
Channel1 Zero-cross Detect Enable Control
0 = channel1 zero-cross detect Disabled.
1 = channel1 zero-cross detect Enabled.
Note1:
Channel1 also means right audio channel while I2S (FORMAT[2]=0) or 2-channel
PCM mode.
Note2:
If this bit is set to 1, when channel1 data sign bit change or next shift data bits are
all zero then CH1ZCIF(I2S_STATUS1[1]) flag is set to 1.
Note3:
If CH1ZCIF Flag is set to 1, the channel1 will be mute.
[0]
CH0ZCEN
Channel0 Zero-cross Detection Enable Control
0 = channel0 zero-cross detect Disabled.
1 = channel0 zero-cross detect Enabled.
Note1:
Channel0 also means left audio channel while I2S (FORMAT[2]=0) or 2-channel
PCM mode.
Note2:
If this bit is set to 1, when channel0 data sign bit change or next shift data bits are
all zero then CH0ZCIF(I2S_STATUS1[0]) flag is set to 1.
Note3:
If CH0ZCIF Flag is set to 1, the channel0 will be mute.
Содержание ISD94100 Series
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