ISD94100 Series Technical Reference Manual
Sep 9, 2019
Page
649
of 928
Rev1.09
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ICA
L
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NCE
M
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U
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S
I2C_DAT
(SLA+W)
ACK
Master to Slave
Slave to Master
I2C_DAT
(
ROM Address High Byte
)
ACK
Sr
I2C_DAT
(SLA+R)
ACK
P
STATUS=0x08
(STA,STO,SI,AA)=(1,0,1,x)
STATUS=0x18
I2C_DAT=SLA+W
(STA,STO,SI,AA)=(0,0,1,x)
STATUS=0x28
I2C_DAT=ROM Address High Byte
(STA,STO,SI,AA)=(0,0,1,x)
STATUS=0x10
(STA,STO,SI,AA)=(1,0,1,x)
STATUS=0xf8
(STA,STO,SI,AA)=(0,1,1,x)
I2C_DAT=SLA+R
(STA,STO,SI,AA)=(0,0,1,x)
STATUS=0x40
NAK
STATUS=0x20
I2C_DAT
(
ROM Address Low Byte
)
ACK
STATUS=0x28
I2C_DAT=ROM Address Low Byte
(STA,STO,SI,AA)=(0,0,1,x)
P
STATUS=0xf8
(STA,STO,SI,AA)=(0,1,1,x)
NAK
STATUS=0x30
I2C_DAT
(Data)
NAK
STATUS=0x58
Read I2C_DAT to Get Data
(STA,STO,SI,AA)=(0,0,1,0)
P
STATUS=0xf8
(STA,STO,SI,AA)=(0,1,1,x)
NAK
STATUS=0x48
P
STATUS=0xf8
(STA,STO,SI,AA)=(0,1,1,x)
Figure 6.13-30 Protocol of EEPROM Random Read
The I
2
C controller, which is a master, sends START to bus. Then, it sends a SLA+W (Slave address
+ Write bit) to EERPOM followed by two bytes data address to set the EEPROM address to read.
Finally, a Repeat START followed by SLA+R is sent to read the data from EEPROM.
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