6-19
IM 701210-05E
Triggering
6
6.10 Setting the A -> B(N) Trigger (ENHANCED)
Explanation
This function activates a trigger on the n
th
time condition B becomes true after condition
A becomes true.
Setting Conditions A and B
• Pattern of Each Channel: CH1 to CH16, Logic A, and Logic B
Select from the following:
• For CH1 to CH16 (Other Than Logic Inputs)
H: Above the preset trigger level
L:
Below the preset trigger level
X:
Don’t Care
• For Logic Input
Enable: Make the combination of the pattern
1
of each bit the trigger condition
Disable: Don’t Care
1. Select the pattern of each bit from the following:
H: Above a certain level
2
L: Below a certain level
2
X: Don’t Care
2. Varies depending on the logic probe being used as follows:
700986: Approx. 1.4 V
700987: 6 V
±
50% (for DC input)
700987: 50 V
±
50% (for AC input)
• Condition
Select from the following:
Enter: A trigger is activated when all channels match the specified pattern.
Exit:
A trigger is activated when any of the channels no longer match the specified
pattern.
• Number of Times Condition B Is to Be Met
1 to 255 times
Setting the Trigger Level
The trigger level setting applies to both simple and enhanced triggers.
For details, see “Setting the Trigger Level” in section 6.5.
Setting the Trigger Hysteresis
Sets a width to the trigger level so that triggers are not activated by small changes in the
trigger signal. Select the trigger hysteresis from
,
, and
.
For details, see “Setting the Trigger Hysteresis” in section 6.5.
Setting the Hold Off
For details, see section 6.4, “Setting the Hold Off Time.”
Note
•
If you wish to use a simple pattern trigger (only one pattern condition for activating the trigger),
set all of the status of condition B to Xs (Don’t care) and set a pattern for condition A.
•
If you wish to set the trigger only on the condition of the pattern of each bit of the logic
input (trigger on the AND of each bit), then make the following settings.
Condition A pattern:
Set the logic input channels to be used to Enable,
All other channels to X (Don’t care)
Condition B pattern:
All Xs (Don’t Care)
Bit pattern of logic input:
Set arbitrarily.