Remote Control
R&S
®
NRT2
98
User Manual 1178.5550.02 ─ 04
Table 11-1: Used status byte bits and their meaning
Bit
no.
Short description
Bit is set if
2
Error queue not empty
The error queue has an entry. If this bit is enabled by the ser-
vice request enable register, each entry of the error queue
generates a service request. An error can thus be recognized
and specified in detail by querying the error queue. The query
yields a conclusive error message. This procedure is recom-
mended since it considerably reduces the problems of IEC/
IEEE-bus control.
3
Questionable status register
summary
An
EVENt
bit is set in the
QUEStionable
status register and
the associated
ENABLe
bit is set to 1. A set bit denotes a ques-
tionable device status which can be specified in greater detail
by querying the questionable status register.
Chapter 11.2.5, "Questionable Status Register"
4
MAV
Message available
A readable message is in the output queue. This bit can be
used to automate reading of data from the instrument into the
controller.
5
ESB
Standard event status register
summary
One of the bits in the standard event status register is set and
enabled in the event status enable register. Setting this bit
denotes a serious error which can be specified in greater detail
by querying the standard event status register.
Chapter 11.2.6, "Standard Event Status and Enable Register
(ESR, ESE)"
6
MSS
Master status summary
The instrument triggers a service request, which happens if
one of the other bits of this register is set together with its
enable bit in the service request enable register (SRE).
7
Operation status register sum-
mary
An
EVENt
bit is set in the operation status register and the
associated
ENABLe
bit is set to 1. A set bit denotes that an
action is being performed by the instrument. Information on the
type of action can be obtained by querying the operation sta-
tus register.
Chapter 11.2.7, "Operation Status Register"
11.2.4
IST Flag and Parallel Poll Enable Register (PPE)
Similar to the service request (SRQ), the IST flag combines the complete status infor-
mation in a single bit. It can be queried by a parallel poll or by
.
The parallel poll enable register (PPE) determines which bits of the STB affect the IST
flag. The bits of the STB are ANDed with the corresponding bits of the PPE; bit
6 is
also used, in contrast to the service request enable register. The IST flag is obtained
by
ORing
all results together.
Set and read the parallel poll enable register using
11.2.5
Questionable Status Register
Contains information on questionable instrument states that occur if the instrument is
not operated in compliance with its specifications.
Status Reporting System
