
Section 22 Pin Function Controller (PFC)
Rev. 4.00 Sep. 14, 2005 Page 842 of 982
REJ09B0023-0400
SDA input data
SCL input data
SDA output data
SCL output data
PTG[10] output enable
PTG[9] output enable
PTG[10] output data
PTG[9] output data
PTG[10] input data
PTG[9] input data
PTG[10] /SDA
PTG[9] /SCL
Figure 22.2 Internal Block Diagram of I/O Buffer with Open Drain
22.3
Notes on Usage
•
Pins function as outputs when other function is selected by the port control register
When the pin function (shown in table 22.1, List of Multiplexed Pins) is changed from other
function (output) to port function (input), the weak keeper in figure 22.1 holds the value of the
port data register of the pin.
•
Pins function as inputs/outputs when other function is selected by the port control register
When the pin function (shown in table 22.1, List of Multiplexed Pins) is changed from port
function (input) to other function (output), the weak keeper in figure 22.1 holds the other
function value of the pin.
•
Pins PTG10 and PTG9
The I/O buffers of PG10 and PTG9 have no weak keeper. When you do not use these pins, pull
up or pull down them. If you use them as port input, do not apply mid-voltage.
•
Pins with weak keepers
Immediately after a power-on reset, the level of the pin which has a weak keeper is not
undefined whether high or low. Thus, to fix the pin level, the pin needs to be pulled up or
down.
Reference pull-up and pull-down resistances are shown below. These resistances change
according to the circuit configuration.
Pull-up resistance (reference value) = 2 k
Ω
Pull-down resistance (reference value) = 8 k
Ω
Summary of Contents for HD6417641
Page 2: ...Rev 4 00 Sep 14 2005 Page ii of l...
Page 7: ...Rev 4 00 Sep 14 2005 Page vii of l...
Page 11: ...Rev 4 00 Sep 14 2005 Page xi of l USB Universal serial bus WDT Watch dog timer...
Page 12: ...Rev 4 00 Sep 14 2005 Page xii of l...
Page 28: ...Rev 4 00 Sep 14 2005 Page xxviii of l...
Page 204: ...Section 4 Clock Pulse Generator CPG Rev 4 00 Sep 14 2005 Page 154 of 982 REJ09B0023 0400...
Page 212: ...Section 5 Watchdog Timer WDT Rev 4 00 Sep 14 2005 Page 162 of 982 REJ09B0023 0400...
Page 228: ...Section 6 Power Down Modes Rev 4 00 Sep 14 2005 Page 178 of 982 REJ09B0023 0400...
Page 246: ...Section 8 X Y Memory Rev 4 00 Sep 14 2005 Page 196 of 982 REJ09B0023 0400...
Page 318: ...Section 11 User Break Controller UBC Rev 4 00 Sep 14 2005 Page 268 of 982 REJ09B0023 0400...
Page 454: ...Section 12 Bus State Controller BSC Rev 4 00 Sep 14 2005 Page 404 of 982 REJ09B0023 0400...
Page 504: ...Section 14 U Memory Rev 4 00 Sep 14 2005 Page 454 of 982 REJ09B0023 0400...
Page 566: ...Section 17 Compare Match Timer CMT Rev 4 00 Sep 14 2005 Page 516 of 982 REJ09B0023 0400...
Page 868: ...Section 21 A D Converter Rev 4 00 Sep 14 2005 Page 818 of 982 REJ09B0023 0400...
Page 914: ...Section 23 I O Ports Rev 4 00 Sep 14 2005 Page 864 of 982 REJ09B0023 0400...
Page 956: ...Section 24 List of Registers Rev 4 00 Sep 14 2005 Page 906 of 982 REJ09B0023 0400...
Page 1016: ...Section 25 Electrical Characteristics Rev 4 00 Sep 14 2005 Page 966 of 982 REJ09B0023 0400...
Page 1024: ...Appendix Rev 4 00 Sep 14 2005 Page 974 of 982 REJ09B0023 0400...
Page 1032: ...Rev 4 00 Sep 14 2005 Page 982 of 982 REJ09B0023 0400 X X Y data addressing 52 X Y memory 193...
Page 1035: ......
Page 1036: ...SH7641 Hardware Manual...