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Section 9 Exception Handling
Rev. 4.00 Sep. 14, 2005 Page 199 of 982
REJ09B0023-0400
9.1.2
Exception Event Register (EXPEVT)
EXPEVT is assigned to address H'FFFFFFD4 and consists of a 12-bit exception code. Exception
codes to be specified in EXPEVT are those for resets and general exceptions. These exception
codes are automatically specified the hardware when an exception occurs. Only bits 11 to 0 of
EXPEVT can be re-written using the software.
Bit Bit
Name
Initial
Value R/W Description
31 to 12
All
0
R
Reserved
These bits are always read as 0. The write value
should always be 0.
11 to 0
EXPEVT
*
R/W
12-Bit Exception Code
Note:
*
Initialized to H'000 at power-on reset and H'020 at manual reset.
9.1.3 Interrupt
Event
Register 2 (INTEVT2)
INTEVT2 is assigned to address H'A4000000 and consists of a 12-bit exception code. Exception
codes to be specified in INTEVT2 are those for interrupt requests. These exception codes are
automatically specified by the hardware when an exception occurs. INTEVT2 cannot be modified
using the software.
Bit Bit
Name
Initial
Value R/W Description
31 to 12
All
0
R
Reserved
These bits are always read as 0. The write value
should always be 0.
11 to 0
INTEVT2
R/W
12-Bit Exception Code
Note: Initialized to H'000 at power-on reset and H'020 at manual reset.
Summary of Contents for HD6417641
Page 2: ...Rev 4 00 Sep 14 2005 Page ii of l...
Page 7: ...Rev 4 00 Sep 14 2005 Page vii of l...
Page 11: ...Rev 4 00 Sep 14 2005 Page xi of l USB Universal serial bus WDT Watch dog timer...
Page 12: ...Rev 4 00 Sep 14 2005 Page xii of l...
Page 28: ...Rev 4 00 Sep 14 2005 Page xxviii of l...
Page 204: ...Section 4 Clock Pulse Generator CPG Rev 4 00 Sep 14 2005 Page 154 of 982 REJ09B0023 0400...
Page 212: ...Section 5 Watchdog Timer WDT Rev 4 00 Sep 14 2005 Page 162 of 982 REJ09B0023 0400...
Page 228: ...Section 6 Power Down Modes Rev 4 00 Sep 14 2005 Page 178 of 982 REJ09B0023 0400...
Page 246: ...Section 8 X Y Memory Rev 4 00 Sep 14 2005 Page 196 of 982 REJ09B0023 0400...
Page 318: ...Section 11 User Break Controller UBC Rev 4 00 Sep 14 2005 Page 268 of 982 REJ09B0023 0400...
Page 454: ...Section 12 Bus State Controller BSC Rev 4 00 Sep 14 2005 Page 404 of 982 REJ09B0023 0400...
Page 504: ...Section 14 U Memory Rev 4 00 Sep 14 2005 Page 454 of 982 REJ09B0023 0400...
Page 566: ...Section 17 Compare Match Timer CMT Rev 4 00 Sep 14 2005 Page 516 of 982 REJ09B0023 0400...
Page 868: ...Section 21 A D Converter Rev 4 00 Sep 14 2005 Page 818 of 982 REJ09B0023 0400...
Page 914: ...Section 23 I O Ports Rev 4 00 Sep 14 2005 Page 864 of 982 REJ09B0023 0400...
Page 956: ...Section 24 List of Registers Rev 4 00 Sep 14 2005 Page 906 of 982 REJ09B0023 0400...
Page 1016: ...Section 25 Electrical Characteristics Rev 4 00 Sep 14 2005 Page 966 of 982 REJ09B0023 0400...
Page 1024: ...Appendix Rev 4 00 Sep 14 2005 Page 974 of 982 REJ09B0023 0400...
Page 1032: ...Rev 4 00 Sep 14 2005 Page 982 of 982 REJ09B0023 0400 X X Y data addressing 52 X Y memory 193...
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