8.5.43. divu
Instruction
divide unsigned
Operation
rC ← rA ÷ rB
Assembler Syntax
divu rC, rA, rB
Example
divu r6, r7, r8
Description
Treating rA and rB as unsigned integers, this instruction
divides rA by rB and then stores the integer portion of the
resulting quotient to rC. After attempted division by zero,
the value of rC is undefined. There is no divide-by-zero
exception.
Nios II processors that do not implement the
divu
instruction cause an unimplemented instruction exception.
Usage
Remainder of Division:
If the result of the division is defined, then the remainder
can be computed in rD using the following instruction
sequence:
divu rC, rA, rB
mul rD, rC, rB
sub rD, rA, rD
# The original divu operation
# rD = remainder
Exceptions
Division error
Unimplemented instruction
Instruction Type
R
Instruction Fields
A
= Register index of operand rA
B
= Register index of operand rB
C
= Register index of operand rC
Bit Fields
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
A
B
C
0x24
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
0x24
0
0x3a
8.5.44. eret
Instruction
exception return
Operation
status
←
estatus
PC ←
ea
Assembler Syntax
eret
Example
eret
Description
Copies the value of
estatus
into the
status
register, and
transfers execution to the address in
ea
.
Usage
Use
eret
to return from traps, external interrupts, and
other exception handling routines. Note that before
returning from hardware interrupt exceptions, the exception
handler must adjust the
ea
register.
continued...
8. Instruction Set Reference
NII-PRG | 2018.04.18
Nios II Processor Reference Guide
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