Notation
Meaning
~X
Bitwise logical NOT (one’s complement)
Mem8[X]
The byte located in data memory at byte address X
Mem16[X]
The halfword located in data memory at byte address X
Mem32[X]
The word located in data memory at byte address X
label
An address label specified in the assembly file
(signed) rX
The value of rX treated as a signed number
(unsigned) rX
The value of rX treated as an unsigned number
Note:
All register operations apply to the current register set, except as noted.
The following exceptions are not listed for each instruction because they can occur on
any instruction fetch:
•
Supervisor-only instruction address
•
Fast TLB miss (instruction)
•
Double TLB miss (instruction)
•
TLB permission violation (execute)
•
MPU region violation (instruction)
For information about these and all Nios II exceptions, refer to the Programming
Model chapter of the Nios II Processor Reference Handbook.
Related Information
Programming Model
on page 36
8.5.1. add
Instruction
add
Operation
rC ← rA + rB
Assembler Syntax
add rC, rA, rB
Example
add r6, r7, r8
Description
Calculates the sum of rA and rB. Stores the result in rC.
Used for both signed and unsigned addition.
Usage
Carry Detection (unsigned operands):
Following an
add
operation, a carry out of the MSB can be
detected by checking whether the unsigned sum is less than
one of the unsigned operands. The carry bit can be written
to a register, or a conditional branch can be taken based on
the carry condition. The following code shows both cases:
add rC, rA, rB
cmpltu rD, rC, rA
add rC, rA, rB
bltu rC, rA, label
# The original add operation
# rD is written with the carry bit
# The original add operation
continued...
8. Instruction Set Reference
NII-PRG | 2018.04.18
Nios II Processor Reference Guide
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