Exceptions
None
Instruction Type
I
Instruction Fields
A
= Register index of operand rA
B
= Register index of operand rB
IMM16
= 16-bit signed immediate value
Bit Fields
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
A
B
IMM16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
IMM16
0x18
8.5.41. custom
Instruction
custom instruction
Operation
if c == 1
then rC ← f
N
(rA, rB, A, B, C)
else Ø ← f
N
(rA, rB, A, B, C)
Assembler Syntax
custom N, xC, xA, xB
Where xA means either general purpose register rA, or
custom register cA.
Example
custom 0, c6, r7, r8
Description
The
custom
opcode provides access to up to 256 custom
instructions allowed by the Nios II architecture. The function
implemented by a custom instruction is user-defined and is
specified with the Nios_II Processor parameter editor in
Platform Designer. The 8-bit immediate N field specifies
which custom instruction to use. Custom instructions can
use up to two parameters, xA and xB, and can optionally
write the result to a register xC.
Usage
To access a custom register inside the custom instruction
logic, clear the bit readra, readrb, or writerc that
corresponds to the register field. In assembler syntax, the
notation cN refers to register N in the custom register file
and causes the assembler to clear the c bit of the opcode.
For example,
custom 0, c3, r5, r0
performs custom
instruction 0, operating on general-purpose registers r5 and
r0, and stores the result in custom register 3.
Exceptions
None
Instruction Type
R
Instruction Fields
A
= Register index of operand A
B
= Register index of operand B
C
= Register index of operand C
readra
= 1 if instruction uses rA, 0 otherwise
readrb
= 1 if instruction uses rB, 0 otherwise
writerc
= 1 if instruction provides result for rC, 0
otherwise
N
= 8-bit number that selects instruction
8. Instruction Set Reference
NII-PRG | 2018.04.18
Nios II Processor Reference Guide
195
