March 2002 Release
471
Virtex-II Pro™ Platform FPGA Documentation
1-800-255-7778
R
Chapter 6
Virtual-Memory Management
Programs running on the PPC405 use effective addresses to access a flat 4 GB address
space. The processor can interpret this address space in one of two ways, depending on the
translation mode:
•
In
real mode
, effective addresses are used to directly access physical memory.
•
In
virtual mode
, effective addresses are translated into physical addresses by the
virtual-memory management hardware in the processor.
Virtual mode provides system software with the ability to relocate programs and data
anywhere in the physical address space. System software can move inactive programs and
data out of physical memory when space is required by active programs and data.
Relocation can make it appear to a program that more memory exists than is actually
implemented by the system. This frees the programmer from working within the limits
imposed by the amount of physical memory present in a system. Programmers do not
need to know which physical-memory addresses are assigned to other software processes
and hardware devices. The addresses visible to programs are translated into the
appropriate physical addresses by the processor.
Virtual mode provides greater control over memory protection. Blocks of memory as small
as 1 KB can be individually protected from unauthorized access. Protection and relocation
enable system software to support
multitasking
. This capability gives the appearance of
simultaneous or near-simultaneous execution of multiple programs.
In the PPC405, virtual mode is implemented by the memory-management unit (MMU).
The MMU controls effective-address to physical-address mapping and supports memory
protection. Using these capabilities, system software can implement demand-paged
virtual memory and other memory management schemes.
The MMU features are summarized as follows:
•
Translates effective addresses into physical addresses.
•
Controls page-level access during address translation.
•
Provides additional virtual-mode protection control through the use of zones.
•
Provides independent control over instruction-address and data-address translation
and protection.
•
Supports eight page sizes: 1 KB, 4 KB, 16 KB, 64 KB, 256 KB, 1 MB, 4 MB, and 16 MB.
Any combination of page sizes can be used by system software.
•
Software controls the page-replacement strategy.
Real Mode
The processor references memory when it fetches an instruction and when it accesses data
with a load, store, or cache-control instruction. Programs reference memory locations
using a 32-bit effective address (EA) calculated by the processor based on the address
mode (see
). When real mode is enabled, the
