Xilinx Virtex-II Pro PPC405, User Manual

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March 2002 Release www.xilinx.com 863
Virtex-II Pro™ Platform FPGA Documentation 1-800-255-7778
Exceptions
R
The PowerPC Book-E architecture replaces the exception-vector prefix register (EVPR)
with the interrupt-vector prefix register (IVPR). The IVPR contains the high-order 16 bits of
the exception-vector effective address, which is the same function performed by the EVPR.
The PowerPC Book-E architecture also defines 16 interrupt-vector offset registers (IVOR0–
IVOR15) that replace the function of the predefined vector offsets assigned to each
exception. Any arbitrary word-aligned vector offset can be loaded into these registers,
which are assigned to a specific exception.
When an exception occurs, the processor calculates the interrupt-handler effective address
by adding the contents of the IVPR to the contents of the appropriate IVOR
n . System
software can emulate the operation of the PowerPC 40x interrupt mechanism by
preloading the IVOR
n registers with the appropriate vector offsets, as shown in Table F-7 .
Some bits in the exception-syndrome register (ESR) are redefined to support different
exception conditions. These changes are shown in
Table F-8 .
Table F-7: Exceptions and Associated IVOR n Registers
IVOR Exception PowerPC 40x Offset
IVOR0 Critical Input 0x0100
IVOR1 Machine Check 0x0200
IVOR2 Data Storage 0x0300
IVOR3 Instruction Storage 0x0400
IVOR4 External 0x0500
IVOR5 Alignment 0x0600
IVOR6 Program 0x0700
IVOR7 FPU Unavailable 0x0800
IVOR8 System Call 0x0C00
IVOR9 APU Unavailable 0x0F20
IVOR10 Decrementer (Programmable-Interval Timer) 0x1000
IVOR11 Fixed-Interval Timer 0x1010
IVOR12 Watchdog Timer 0x1020
IVOR13 Data TLB Miss 0x1100
IVOR14 Instruction TLB Miss 0x1200
IVOR15 Debug 0x2000
Table F-8: Comparison of ESR Bit Definitions
Bit PowerPC 40x Function PowerPC Book-E Function
0 MCI—Instruction Machine Check Implementation dependent
1:3 Reserved
4 PIL—Program, Illegal Instruction
5 PPR—Program, Privileged Instruction
6 PTR—Program, Trap Instruction
7 PEU—Program, Unimplemented
Instruction FP—Floating-Point Instruction
8 DST—Data Storage, Store Instruction ST—Store