Xilinx Virtex-II Pro PPC405, User Manual

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332 www.xilinx.com March 2002 Release
1-800-255-7778 Virtex-II Pro™ Platform FPGA Documentation
Chapter 1: Introduction to the PPC405
R
the load/store string instructions. Integer data are either signed or unsigned, and signed
data is represented using two’s-complement format.
The address of a multi-byte operand is determined using the lowest memory address
occupied by that operand. For example, if the four bytes in a word operand occupy
addresses 4, 5, 6, and 7, the word address is 4. The PPC405 supports both big-endian (an
operand’s
most-significant byte is at the lowest memory address) and little-endian (an
operand’s least-significant byte is at the lowest memory address) addressing.
See Operand Conventions , page 347 , for more information on the supported data types
and byte ordering.
Register Set Summary
Figure 1-2, page 333 shows the registers contained in the PPC405. Descriptions of the
registers are in the following sections.