634
March 2002 Release
1-800-255-7778
Virtex-II Pro™ Platform FPGA Documentation
Chapter 11:
Instruction Set
R
iccci
Instruction Cache Congruence Class Invalidate
Description
This is a privileged instruction.
This instruction invalidates all lines in the instruction cache. The operands are not used. In
previous implementations, the operands were used to calculate an effective address (EA)
for use in protection checks. The instruction form is retained for software and tool
compatibility.
This instruction is intended for use during initialization to invalidate the entire instruction
cache before is enabled.
Pseudocode
Invalidate the instruction-cache
Registers Altered
•
None.
Exceptions
•
Program—Attempted execution of this instruction from user mode.
This instruction does not cause data-storage exceptions, data TLB-miss exceptions, or data
address-compare (DAC) debug exceptions.
Execution of any of the following invalid-instruction forms results in a boundedly-
undefined result rather than a program exception:
•
Reserved bits containing a non-zero value.
Compatibility
This instruction is implementation specific and is not guaranteed to be supported by other
PowerPC processors.
iccci
r
A,
r
B
X Instruction Form
31
0
0
0
0
0
r
A
r
B
966
0
0
6
1
1
1
6
2
1
3
1
