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March 2002 Release
577
Virtex-II Pro™ Platform FPGA Documentation
1-800-255-7778
Alphabetical Instruction Listing
R
addic.
Add Immediate Carrying and Record
Description
The SIMM field is sign-extended to 32 bits and added to the contents of register
r
A
.
The
resulting sum is loaded into register
r
D. XER[CA] is updated to reflect the unsigned
magnitude of the resulting sum.
addic.
is one of three instructions that implicitly update CR[CR0] without having an RC
field. The other instructions are
andi.
and
andis.
.
Simplified mnemonics defined for this instruction are described in
Pseudocode
(
r
D)
←
(
r
A) + EXTS(SIMM)
if
(
r
D)
2
32
−
1
then XER[CA]
←
1
else
XER[CA]
←
0
Registers Altered
•
r
D.
•
XER[CA].
•
CR[CR0]
LT, GT, EQ, SO
.
Exceptions
•
None.
Compatibility
This instruction is defined by the PowerPC user instruction-set architecture (UISA). It is
implemented by all PowerPC processors.
addic.
r
D,
r
A, SIMM
D Instruction Form
13
r
D
r
A
SIMM
0
6
1
1
1
6
3
1
>
u