Preliminary
Architecture
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3.2.17 Power Management
Each of the three main components of the EMAC peripheral can independently be placed in
reduced-power modes to conserve power during periods of low activity. The power management of the
EMAC peripheral is controlled by the PRCM. The PRCM acts as a master controller for power
management on behalf of all of the peripherals on the device.
The power conservation modes available for each of the three components of the EMAC/MDIO
peripheral are:
•
Idle/Disabled state. This mode stops the clocks going to the peripheral, and prevents all the register
accesses. After reenabling the peripheral from this idle state, all the registers values prior to setting
into the disabled state are restored, and data transmission can proceed. No reinitialization is
required.
•
Synchronized reset. This state is similar to the Power-on Reset (POR) state, when the processor is
turned-on; reset to the peripheral is asserted, and clocks to the peripheral are gated after that. The
registers are reset to their default value. When powering-up after a synchronized reset, all the
EMAC submodules need to be reinitialized before any data transmission can happen.
For more information on the use of the PRCM, see the PRCM Reference Guide.
3.2.18 Emulation Considerations
NOTE:
For correct operation, the EMAC and EMAC control module must both be suspended.
Thus, the EMCONTROL and CMEMCONTROL registers must be configured alike.
EMAC emulation control is implemented for compatibility with other peripherals. The SOFT and FREE
bits in the emulation control register (EMCONTROL) allow EMAC operation to be suspended.
Additionally, emulation control is also implemented in the EMAC control module with the EMAC control
module emulation control register (CMEMCONTROL) to allow the EMAC control module activity to be
suspended.
When the emulation suspend state is entered, the EMAC stops processing receive and transmit frames
at the next frame boundary. Any frame currently in reception or transmission is completed normally
without suspension. For transmission, any complete or partial frame in the transmit cell FIFO is
transmitted. For receive, frames that are detected by the EMAC after the suspend state is entered are
ignored. No statistics are kept for ignored frames.
shows how the SOFT and FREE bits affect the operation of the emulation suspend.
Table 3-8. Emulation Control
SOFT
FREE
Description
0
0
Normal operation
1
0
Emulation suspend
X
1
Normal operation
454
EMAC/MDIO Module
SPRUGX9 – 15 April 2011
© 2011, Texas Instruments Incorporated