Preliminary
Registers
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Table 2-23. DMM_PAT_IRQENABLE_SET Register Field Descriptions (continued)
Bit
Field
Value
Description
Type
5
ERR_UPD_CTRL0
0
Control register update whilst refilling error event in area 0
R/W1S
4
ERR_UPD_AREA0
0
Area register update whilst refilling error event in area 0
R/W1S
3
ERR_INV_DATA0
0
Invalid entry-table pointer error event in area 0
R/W1S
2
ERR_INV_DSC0
0
Invalid descriptor pointer error event in area 0
R/W1S
1
FILL_LST0
0
End of refill event for the last descriptor in area 0
R/W1S
0
FILL_DSC0
0
End of refill event for any descriptor in area 0
R/W1S
398
DMM/TILER
SPRUGX9 – 15 April 2011
© 2011, Texas Instruments Incorporated