FCLK
Data capture on GPMC side: RdAccessTime = 9
nADV
AdvRdOffTime = 1
RdCycleTime = 11
nCS
nOE
Valid Address
A/D bus
CsReadOffTime = 10
OeOffTime = 10
OeOnTime = 3
Data Setup time
Data Hold time
tOEZ
Valid Address
DATA
Memory-side access time
Preliminary
Use Cases And Tips
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Table 5-49. GPMC Timing Parameters for Asynchronous Read Access
Number of
Duration
Parameter Name on
Clock Cycles
(ns)
GPMC side
Formula
(F = 104 MHz)
GPMC Register Configurations
ClkActivationTime
n/a (asynchronous mode)
AccessTime
round max (tCE)
80
9
ACCESSTIME = 9h
PageBurstAccessTime
n/a (single access)
RdCycleTime
Acce tOEZ
96, 615
11
RDCYCLETIME = Bh
CsOnTime
tCAS
0
0
CSONTIME = 0
CsReadOffTime
Acce 1 cycle
89, 615
10
CSRDOFFTIME = Ah
AdvOnTime
tAAVDS
3
1
ADVONTIME = 1
AdvRdOffTime
tAVDP
9
1
ADVRDOFFTIME = 1
OeOnTime
≥
AdvRdOffTime
OeOnTime
-
3, for instance
OEONTIME = 3h
(multiplexed mode)
OeOffTime
Acce 1cycle
89, 615
10
OEOFFTIME = Ah
Figure 5-49. Asynchronous Single Read Access (Timing Parameters in Clock Cycles)
656
General-Purpose Memory Controller (GPMC)
SPRUGX9 – 15 April 2011
© 2011, Texas Instruments Incorporated