Preliminary
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Error Location Module
1.15.5.5 ELM Interrupt Enable Register (ELM_IRQENABLE)
The ELM Interrupt Enable Register (ELM_IRQENABLE) is shown in
and described in
.
Figure 1-101. ELM Interrupt Enable Register (ELM_IRQENABLE)
31
16
Reserved
R-0
15
9
8
Reserved
PAGE_MASK
R-0
R/W-0
7
6
5
4
3
2
1
0
LOCATION_
LOCATION_
LOCATION_
LOCATION_
LOCATION_
LOCATION_
LOCATION_
LOCATION_
MASK_7
MASK_6
MASK_5
MASK_4
MASK_3
MASK_2
MASK_1
MASK_0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 1-139. ELM Interrupt Enable Register (ELM_IRQENABLE) Field Descriptions
Bit
Field
Value
Description
31-9
Reserved
0
Reserved
8
PAGE_MASK
Page interrupt mask bit
0
Disable interrupt.
1
Enable interrupt.
7
LOCATION_MASK_7
Error-location interrupt mask bit for syndrome polynomial 7.
0
Disable interrupt.
1
Enable interrupt.
6
LOCATION_MASK_6
Error-location interrupt mask bit for syndrome polynomial 6.
0
Disable interrupt.
1
Enable interrupt.
5
LOCATION_MASK_5
Error-location interrupt mask bit for syndrome polynomial 5.
0
Disable interrupt.
1
Enable interrupt.
4
LOCATION_MASK_4
Error-location interrupt mask bit for syndrome polynomial 4.
0
Disable interrupt.
1
Enable interrupt.
3
LOCATION_MASK_3
Error-location interrupt mask bit for syndrome polynomial 3.
0
Disable interrupt.
1
Enable interrupt.
2
LOCATION_MASK_2
Error-location interrupt mask bit for syndrome polynomial 2.
0
Disable interrupt.
1
Enable interrupt.
1
LOCATION_MASK_1
Error-location interrupt mask bit for syndrome polynomial 1.
0
Disable interrupt.
1
Enable interrupt.
0
LOCATION_MASK_0
Error-location interrupt mask bit for syndrome polynomial 0.
0
Disable interrupt.
1
Enable interrupt.
263
SPRUGX9 – 15 April 2011
Chip Level Resources
© 2011, Texas Instruments Incorporated