![background image](http://html1.mh-extra.com/html/omron/cvm1d/cvm1d_operation-manual_742532421.webp)
417
6-1-6 I/O Refreshing in SYSMAC BUS/2 and SYSMAC BUS Systems
SYSMAC BUS/2
I/O refreshing takes place once each PC cycle, but I/O points in the SYSMAC
BUS/2 System may not be refreshed every cycle if the SYSMAC BUS/2 commu-
nications cycle is longer than the PC cycle.
I/O refreshing of Units in a SYSMAC BUS/2 System can be disabled by turning
ON the corresponding CPU Bus Service Disable Bits in A015. Bits 00 to 15
correspond to Units #0 to #15, respectively. Turn the bits OFF again to enable
service and resume I/O refreshing.
SYSMAC BUS
I/O refreshing takes place once each PC cycle.
I/O refreshing of Units in a SYSMAC BUS System can be disabled by turning ON
bit A01705 (the I/O Refresh Disable Bit). Turn A01705 OFF again to resume I/O
refreshing.
6-1-7 Power OFF Operation
This section details CPU operation when power is turned OFF and ON, and dur-
ing a momentary power interruption.
Power OFF/ON
The following diagram and explanation show the CPU operation when the power
goes off and when power is turned on.
Power supply
Power interruption
signal
Program execution
Momentary Power
Interruption Flag
(A40202)
CPU reset signal
RUN output
85%
Power interruption detection
time: 10 to 25 ms for AC power,
0.3 to 1 ms for DC power
Normal
Initialization
processing
Shutdown processing (1 ms)
Normal
Stops
Power interruption
Power application
The following list shows CPU operation when power is interrupted.
1, 2, 3...
1. A power interruption signal is output when the CPU detects a power supply
voltage below 85% of full power. It takes the CPU between 10 ms and 25 ms
to detect the power interruption with an AC power supply and between
0.3 ms and 1 ms to detect the power interruption with a DC power supply.
2. When the power interruption signal is output, program execution is stopped
and the system shutdown procedure (1 ms) takes place. At this point, out-
puts are reset and timer PVs are maintained.
Next, the CPU reset signal is generated, the CPU is stopped, and all outputs
are turned OFF.
The following list shows CPU procedures when power is returned to the PC.
1, 2, 3...
1. When the CPU detects a power supply voltage above 85% of full power,
both the power interruption signal and the CPU reset signal will be turned
OFF.
Power OFF Operation
Power ON Procedure
PC Operation
Section 6-1
Summary of Contents for CVM1D
Page 462: ...SYSMAC CVM1D Duplex System Programmable Controllers Operation Manual Revised August 2001...
Page 463: ...iv...
Page 465: ...vi...