Omron CVM1D, Operation Manual

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3-1 Introduction
Various types of data are required to achieve effective and correct control. To
facilitate managing this data, the PC is provided with various memory areas for
data, each of which performs a different function. The areas generally accessi-
ble by the user for use in programming are classified as data areas. Details, in-
cluding the name, range, and function of each area are summarized in the fol-
lowing table. The internal I/O memory addresses are shown in parentheses.
These memory address are used for indirect addressing. Refer to 3-9 DM and
EM Areas and to 5-3 Data Areas, Definers, and Flags for details on indirect ad-
dressing.
Area Range Function
CIO Area
(Core I/O) Words: CIO 0000 to CIO 2555
Bits:
CIO 000000 to CIO 255515
($0000 to $09FB)
The CIO (Core I/O) Area is divided into eight sections, five
controlling I/O and three used to store and manipulate data
internally.
Refer to 3-3 CIO (Core I/O) Area for details.
Temporary
Relay Area TR0 to TR7 (bits only)
($09FF) Used to temporarily store execution conditions. TR bits are not
input when programming directly in ladder diagrams, and are
used only when programming in mnemonic form.
CPU Bus
Link Area Words: G000 to G255
Bits:
G00000 to G25515
($0A00 to $0AFF)
G000 is the PC Status Area; G001 to G004, the Clock Area.
G008 to G127 contain PC output bits; G128 to G255, CPU Bus
Unit output bits.
Auxiliary
Area Words: A000 to A511
Bits:
A00000 to A51115
($0B00 to $0CFF)
Contains flags and bits with special functions.
Timer Area T0000 to T1023
(Completion Flags: $0F00 to $0F3F
Present Values:
$1000 to $13FF)
Used to define timers (normal, high-speed, and totalizing) and to
access Completion Flags, PV, and SV.
Counter
Area C0000 to C1023
(Completion Flags: $0F80 to $0FBF
Present Values:
$1800 to $1BFF)
Used to define counters (normal, reversible, and transition) and to
access Completion Flags, PV, and SV.
DM Area D00000 to D24575 ($2000 to $7FFF) Used for internal data storage and manipulation.
EM Area E00000 to E32765 for each bank; 2,
4, or 8 banks ($8000 to $8FFD) EM functions just like DM. An Extended Data Memory Unit must
be installed.
Index
registers IR0 to IR2 Used for indirect addressing.
Data
registers DR0 to DR2 Generally used for indirect addressing.
Some data areas contain flags and/or control bits. Flags are bits that are auto-
matically turned ON and OFF to indicate particular operation status. Although
some flags (e.g., the Carry Flag) can be turned ON and OFF by the user, most
flags are read only; they cannot be controlled directly.
Control bits are bits turned ON and OFF by the user to control specific aspects of
operation. Any bit given a name using the word bit rather than the word flag is a
control bit, e.g., Restart Bits are control bits.
3-2 Data Area Structure
Addresses There are two different sets of addresses that can be used to access PC
memory: data area addresses or memory addresses. Data area addresses are
used when specifying an address directly as an operand for an instruction.
Memory addresses are used when using indirect addressing.
When designating a data area address, the acronym for the area (the letter(s)
identifying the data area) is always required for any area except the CIO (Core
I/O) Area. Although the CIO acronym is given for clarity in text explanations, it is
not required and not entered when programming.
Flags and Control Bits
Data Area Structure
Section 3-2