![background image](http://html1.mh-extra.com/html/omron/cvm1d/cvm1d_operation-manual_742532170.webp)
165
5-14-15 DOUBLE SHIFT LEFT: ASLL(064)
(064)
ASLL Wd
Wd: Word
CIO, G, A, DM
Operand Data Area
Ladder Symbol
Variations
j
ASLL(064)
When the execution condition is OFF, ASLL(064) is not executed. When the ex-
ecution condition is ON, ASLL(064) shifts a 0 into bit 00 of Wd, all bits previously
in Wd and Wd+1 are shifted to the left, and bit 15 of Wd+1 is shifted into CY.
0
CY
Wd+1
Wd
Refer to page 101 for general precautions on operand data areas.
Flags
ER (A50003):
Content of
*
DM word is not BCD when set for BCD.
CY (A50004):
Receives the status of bit 15 from Wd+1.
EQ (A50006):
Content of Wd and Wd+1 are 0 after a shift.
N (A50008):
Same status as bit 15 of Wd+1 after shift.
Example
When CIO 000000 is ON in the following example, 0 is shifted into bit 00 of
CIO 0200, the status of all bits within CIO 0200 are shifted left one position, the
status of bit 15 is shifted to bit 00 of CIO 0201, the status of all bits within
CIO 0201 are shifted left one position, and the status of bit 15 is shifted to CY.
Address
Instruction
Operands
00000
LD
000000
00001
ASLL(064)
0200
CY
LSB
MSB
LSB
MSB
0
1
CY
LSB
MSB
LSB
MSB
Wd: CIO 0200
Wd+1: CIO 0201
0 0 0
to
1 1
0 0
1
to
1 0
1 1 0
to
0 1
1 0
to
1 0
Wd: CIO 0200
Wd+1: CIO 0201
Description
Precautions
Shift Instructions
Section 5-14
0000
00
(064)
ASLL
0200
Summary of Contents for CVM1D
Page 462: ...SYSMAC CVM1D Duplex System Programmable Controllers Operation Manual Revised August 2001...
Page 463: ...iv...
Page 465: ...vi...