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Bit A50008 is turned ON when the highest bit in the result of a calculation is ON.
Bit A50009 is turned ON when the absolute value of the result is greater than the
maximum value that can be expressed.
Bit A50010 is turned ON when absolute value of the result is less than the mini-
mum value that can be expressed.
Caution
The previous seven flags are cleared when END(001) is is executed.
3-6-56 Step Flag
Bit A50012 is turned ON for one cycle when step execution is started with the
STEP(008) instruction.
3-6-57 First Cycle Flag
When ladder-only programming is used, bit A50015 turns ON when PC opera-
tion begins and then turns OFF after one cycle of the program. The First Cycle
Flag is useful in initializing counter values and other operations. An example of
this is provided in 5-13 Timer and Counter Instructions.
Note Do not use A50015 to control execution of differentiated instructions. The
instructions will never be executed.
3-6-58 Clock Pulse Bits
Four clock pulses are available to control program timing. Each clock pulse bit is
ON for the first half of the rated pulse time, then OFF for the second half. In other
words, each clock pulse has a duty factor of 50%.
Pulse width
0.1 s
0.2 s
1.0 s
0.02 s
Bit
A50100
A50101
A50102
A50103
These clock pulse bits are often used with counter instructions to create timers.
Refer to 5-13 Timer and Counter Instructions for an example of this.
Recognition of the clock pulse at
the beginning of the program
when the cycle time is shorter
than the clock pulse.
Recognition of the clock pulse at
the beginning of the program
when the cycle time is longer than
usual for one cycle.
Recognition of the clock pulse at
the beginning of the program
when the cycle time is longer than
the clock pulse.
Clock pulse
1: Program execution
2: Programming Device servicing
3: Duplex initialization (See 6-2-2 Duplex Initialization for details on duplex initialization.)
Negative Flag, N
Overflow Flag, OF
Underflow Flag, UF
Auxiliary Area
Section 3-6
Summary of Contents for CVM1D
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