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ber of the Master of the Remote I/O Subsystem involved. These numbers are
assigned to Masters in the order that they are mounted to the CPU and Expan-
sion Racks. If the error is in the Master, the value of bits 4 to 7 will be 8. If the error
is in a Slave, bits 4 to 7 will contain the unit number of the Slave where the error
occurred.
If the content of bits 12 through 15 is other than B, an error has occurred in an
Optical I/O Unit, I/O Link Unit, or I/O Terminal. Here, bits 08 through 15 will pro-
vide the word address (#00 to #31) that has been set on the Unit.
When this Unit is an Optical I/O Unit, bit 04 will be ON if the Unit is assigned left-
most bits (08 through 15), and OFF if it is assigned rightmost bits (00 through
07).
If there are errors in more than one Unit for a single Master, words A470 through
A477 will contain error information for only the first one. Data for the remaining
Units will be stored in memory and can be accessed by turning ON the Error
Check Bit for that Master. Bits A00500 through A00507 are the Error Check Bits
for Masters #0 through #7, respectively. Error Check Bits are automatically
turned OFF when data has been accessed. Write down the data for the first error
if required before using the Error Check Bit; previous data will be cleared when
data for the next error is displayed.
3-6-40 SYSMAC BUS/2 Error Flag and Master/Unit Numbers
Bit A40206 is turned ON when an error occurs during the transmission of data in
the SYSMAC BUS/2 System. The number of the Master involved is written to
word A424, and information about the Slave Unit(s) involved is written to words
A480 through A499.
Bits A42400 through A42403 are turned ON when the error involves Masters #0
through #3, respectively.
Information identifying the Slave Unit(s) involved is contained in words A480
through A499, which are divided into four groups of five words, one group for
each Master, as shown below.
Words
Master number
A480 to A484
0
A485 to A489
1
A490 to A494
2
A495 to A499
3
Bits are turned ON to indicate which of the Slaves connected to the Master was
involved in the error, as shown below.
Word
Bits
Slave
First
00 to 15
Group-1 Slaves #0 to #15
Second
00 to 15
Group-1 Slaves #16 to #31
Third
00 to 15
Group-2 Slaves #0 to #15
Fourth
00 to 07
Slave Racks #0 to #7
(Group-3 Slaves)
08 to 15
Not used.
Fifth
00 to 15
Not used
3-6-41 CPU Bus Unit Error Flag and Unit Numbers
Bit A40207 is turned ON when a parity error occurs during the transmission of
data between the CPU and CPU Bus Units. The unit number of the CPU Bus Unit
involved is written to word A422.
Bits A42200 through A42215 correspond to CPU Bus Units #0 through #15, re-
spectively. When a CPU Bus Unit Error occurs, the bit corresponding to the unit
number of the CPU Bus Unit involved is turned ON.
Error Check Bits
(A00500 to A00507)
Auxiliary Area
Section 3-6
Summary of Contents for CVM1D
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