Omron CVM1D, Operation Manual

Page: 65 / 468

!
59
Caution The CPU may not be able to accurately read clock pulses if the cycle time is lon-
ger than the pulse width.
3-6-59 Network Status Flags
Bits A50200 through A50207 are turned ON to indicate that ports #0 through #7,
respectively, are enabled for the SEND(192), RECV(193), and CMND(194). Bits
A50208 through A50215 are turned ON to indicate that an error has occurred in
ports #0 through #7, respectively, during data communications using
SEND(192), RECV(193), or CMND(194).
A503 through A510 contain the completion codes for ports #0 through #7, re-
spectively, following data communications using SEND(192), RECV(193), or
CMND(194). Refer to the manuals for Communications Units for details on
completion codes.
3-6-60 EM Status Flags
The rightmost digit of A511 will contain the current bank number. Bit A51115 (the
EM Installed Flag) is turned ON when a EM Unit is mounted to the CPU.
3-7 Timer Area
Timer Completion Flags and present values (PV) are accessed through timer
numbers ranging from T0000 through T1023. Each timer number and its set val-
ue (SV) are defined using timer instructions. No prefix is required when using a
timer number to create a timer in one of these instructions.
The same timer number can be defined using more than one of these instruc-
tions as long as the instructions are not executed in the same cycle. If the same
timer number is defined in more than one of these instructions or in the same
instruction twice, an error will be generated during the program check, but as
long as the instructions are not executed in the same cycle, they will operate cor-
rectly. There are no restrictions on the order in which timer numbers can be
used.
Once defined, a timer number can be designated as an operand in one or more
of certain instructions. Timer numbers can be designated for operands that re-
quire bit data or for operands that require word data. When designated as an
operand that requires bit data, the timer number accesses the Completion Flag
of the timer. The Completion Flag will be ON when the timer has timed out. When
designated as an operand that requires word data, the timer number accesses a
memory location that holds the PV of the timer.
Timer PVs are reset when PC operation is begun, when the CNR(236) instruc-
tion is executed, and when in interlocked program sections when the execution
condition for IL(002) is OFF. Refer to 5-8 Interlock and Interlock Clear – IL(02)
and ILC(03) for details on timer operation in interlocked program sections.
Timer Completion Flags are allocated to internal I/O memory addresses (bit ad-
dresses) F000 through F3FF, corresponding to timer numbers T0000 through
T1023. Timer PVs are allocated to internal I/O memory addresses (word ad-
dresses) 1000 through 13FF, corresponding to timer numbers T0000 through
T1023. Completion Flags and PVs can be accessed directly with their internal
I/O memory addresses, but they are normally accessed by using the timer num-
bers in the program.
All timer instructions can be affected by the cycle time. Refer to 5-13 Timer and
Counter Instructions for details.
3-8 Counter Area
Counter Completion Flags and present values (PV) are accessed through
counter numbers ranging from C0000 through C1023. Each counter number
Counter Area
Section 3-8