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Indirect addressing can also be used in instructions that require bit operands for
bits in the Core I/O Area ($0000 to $0FFF). These bits are designated by using
the rightmost digits of the memory address as the leftmost three digits of the hex-
adecimal address and adding the bit number as the rightmost digit. For example,
the CIO bit 190000 is designated by $76CA where 76C is the rightmost three
digits of the memory address (CIO word 1900 is $076C) and A is bit 10.
3-10 Index and Data Registers (IR and DR)
The Index Registers, IR0, IR1, and IR2, which contain a single word of data, are
used for indirect addressing. A “,” prefix is included before an Index Register to
indicate indirect addressing, just as the “
*
” prefix is used to indicate indirect ad-
dressing with DM and EM.
If an Index Register is used as an operand in an instruction without the “,” prefix,
the instruction is performed directly on the content of that Index Register, as in
the following example.
08FC moved
to IR0.
Word
Content
D00000
08FC
Word
Content
IR0
08FC
(030)
MOV
D00000
IR0
If an Index Register is used as an operand in an instruction with the “,” prefix, the
instruction is performed on the word at the internal I/O memory address indi-
cated by that Index Register, as in the following example.
Word
Content
IR0
076C
08FC moved
to CIO 1900.
Indicates 076C
(CIO 1900)
Indirect
address
Word
Content
D00000
08FC
Word
Content
CIO 1900
08FC
(030)
MOV
D00000
,IR0
Indirect addressing can also be used in instructions that require bit operands for
bits in the Core I/O Area ($0000 to $0FFF). These bits are designated by using
the rightmost digits of the memory address as the leftmost three digits of the hex-
adecimal address and adding the bit number as the rightmost digit. For example,
the bit CIO 190000 is designated by $76CA where 76C is the rightmost three
digits of the memory address (word CIO 1900 is $076C) and A is bit 10.
The internal I/O memory address indicated in an Index Register can be offset by
a specified constant or by the content of a Data Register (DR0, DR1, or DR2) by
inputting the constant or the Data Register before the “,” prefix. The constant
must be in BCD between –2047 and +2047. To offset the indirect addressing by
+31 words, simply input +31, before the “,” prefix, as shown.
Direct Addressing
Indirect Addressing
Offset Indirect Addressing
Index and Data Registers (IR and DR)
Section 3-10
Summary of Contents for CVM1D
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