Omron CVM1D, Operation Manual

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(134)
ANDL
0010 0020 D00200
0000
00
333
1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1
15 00
0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1
0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1
15 00
15 00
CIO 0010
CIO 0020
D00200
5-25-5 DOUBLE LOGICAL AND: ANDL(134)
Variations
j
ANDL(134)
(134)
ANDL
I
1
I
2
R
I
2
: Input 2 CIO, G, A, T, C, #, DM
R: Result word CIO, G, A, DM
I
1
: Input 1 CIO, G, A, T, C, #, DM
Operand Data Areas Ladder Symbol
When the execution condition is OFF, ANDL(134) is not executed. When the ex-
ecution condition is ON, ANDL(134) logically AND’s corresponding bits of I
1
and
I
1
+1 with I
2
and I
2
+1 and places the result in R and R+1.
Refer to page 101 for general precautions on operand data areas.
Flags ER (A50003): Content of
*
DM word is not BCD when set for BCD.
EQ (A50006): The result is 0.
N (A50008): Shows the status of bit 15 of R+1 after execution.
Example When CIO 000000 is ON in the following example, the logical AND is taken of
corresponding bits in CIO 0010 to CIO 0011 and CIO 0020 to CIO 0020 and the
results is placed in corresponding bits of D00200 and D00201.
Address Instruction Operands
00000 LD 000000
00001 ANDL(134)
0010
0020
D0020
1 0 0 1 1 0 0 1
15 00
0 1 0 1 0 1 0 1
0 0 0 1 0 0 0 1
15 00
15 00
CIO 0011
CIO 0021
D00201
0 1 1 1 1 0 0 1
15 00
0 1 0 1 1 1 1 1
0 1 0 1 1 0 0 1
15 00
15 00
CIO 0010
CIO 0020
D00200
Description
Precautions
Logic Instructions
Section 5-25