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Omron CVM1D, Operation Manual

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51

Word

Bits

00 to 07

08 to 15

A307

Racks #0 to #7 on Master #0

Racks #0 to #7 on Master #1

A308

Racks #0 to #7 on Master #2

Racks #0 to #7 on Master #3

Word A309 contains the cycle time in ms (in binary) required to service Program-
ming Devices, Host Link, and CPU Bus Units. Refer to 6-2 Cycle Time for details.

3-6-19 CPU Bus Unit Service Interval

Words A310 through A325 contain the interval in ms (binary) between CPU Bus
Unit services for Units #0 through #15, respectively. Measuring the service inter-
val can be enabled or disabled in the PC Setup.

3-6-20 Memory Card Flags

The binary number stored in A34300 to A34303 indicates the type of Memory
Card, if any, installed in the Memory Card Drive. (0: None, 1: RAM, 2: EPROM,
3: EEPROM)

Bit A34307 is turned ON when the Memory Card has not been initialized or init-
ialization was not normal.

Bit A34314 is turned ON when the Memory Card is being accessed, i.e., Memory
Card data is being written, read, or compared.

Bit A34315 is turned ON when the Memory Card is write-protected by the write-
protect switch on the card.

3-6-21 Alternate CPU Unit Status Flags

Bit A39409 is turned ON when the other CPU Unit can be removed or connected
during duplex operation.

Bit A39410 is turned ON when there is a CPU error in the other CPU Unit during
duplex operation.

Bit A39411 is turned ON when there is a memory error in the other CPU Unit dur-
ing duplex operation.

3-6-22 Duplex Verification Error Flags

Bit A40200 is turned ON when an error is detected in comparisons between the
CPU Units. Refer to the four flags below (A39612 to A39615) to determine the
cause of the verification error.

Bit A39612 is turned ON when the EM size settings do not match.

Bit A39613 is turned ON when the PC Setup settings do not match.

Bit A39614 is turned ON when the PC Setup is not transferred properly.

Programming Device Cycle
Time (A309)

Memory Card Type 
(A34300 to A34303)

Memory Card Format Error
Flag (A34307)

Accessing Memory Card
Flag (A34314)

Memory Card Protected
Flag (A34315)

Duplex CPU Replacement
Enabled Flag (A39409)

Duplex CPU Error Flag
(A39410)

Duplex CPU Memory Error
Flag (A39411)

Duplex Verification Error
Flag (A40200)

Duplex EM Size Mismatch
Flag (A39612)

Duplex PC Setup Mismatch
Flag (A39613)

Duplex PC Setup Transfer
Error Flag (A39614)

Auxiliary Area

Section 3-6

Summary of Contents for CVM1D

Page 1: ...t for the safe and reliable application of the Programmable Con troller You must read this section and understand the information contained before attempting to set up or operate a PC system 1 Intende...

Page 2: ...ely important that a PC and all PC Units be used for the specified purpose and under the specified conditions especially in applications that can directly or indirectly affect human life You must cons...

Page 3: ...hanges in tempera ture Locations subject to corrosive or flammable gases Locations subject to dust especially iron dust or salts Locations subject to exposure to water oil or chemicals Locations subje...

Page 4: ...o not mount a CVM1D Power Supply Unit in a CVM1 or CV series PC Doing so may result in burning or malfunction Do not mount a CVM1 or CV series Power Supply Unit on a Duplex CVM1D PC Doing so may resul...

Page 5: ...rds in the system used by the customer however must be confirmed by the customer EMC related performance of the OMRON devices that comply with EC Direc tives will vary depending on the configuration w...

Page 6: ...necessary countermeasures to reduce the emissions such as connecting a surge sup pressor or shielding the PC Some methods of reducing emissions are shown below Countermeasures are required when the lo...

Page 7: ...Devices that can be used and provides a list of related FA products and manuals 1 1 Overview 2 1 2 Relay Circuits The Roots of PC Logic 2 1 3 PC Terminology 3 1 4 OMRON Product Terminology 3 1 5 Over...

Page 8: ...dia gram programming A single ladder diagram program is used as in C series PCs CVM1D PCs cannot use SFC programs 1 2 Relay Circuits The Roots of PC Logic PCs historically originate in relay based co...

Page 9: ...the status of the output bits These terms are used when describing different aspects of PC operation When programming one is concerned with what information is held in memory and so I O bits are refe...

Page 10: ...ices to I O points on Units and de termine which I O bits will be allocated to each If the PC includes Special I O Units CPU Bus Units or Link Systems refer to the individual Operation Manuals or Syst...

Page 11: ...guration of the PC Next determine the sequence in which control operations are to occur and the relative timing of the operations Identify the physical relationships between the I O devices as well as...

Page 12: ...in CVM1D mode DEBUG mode is used to check program execution and I O operation after syn tax errors in the program have been corrected With SFC programs step execu tion or section operation can be use...

Page 13: ...rs will not be displayed in the error history either The following table shows which cables can be used when connecting a host computer or Programming Console to the Duplex Unit s peripheral connector...

Page 14: ...nk connector SSS 19 2 9 6 or 4 8 Kbps Set the baud rate on the Duplex Unit s DIP Switch When the host link connector is being used the baud rate can be changed in the PC Setup 19 2 9 6 4 8 or 2 4 Kbps...

Page 15: ...available for the various CVM1D series and related products Catalog number suffixes have been omitted be sure you have the most recent version for your region Product Model number Manual Cat No CVM1D...

Page 16: ...00 CT041 High speed Counter Unit Operation Manual W185 Motion Control Unit CV500 MC221 MC421 Motion Control Unit Operation Manual Introduction W254 Motion Control Unit Operation Manual Details W255 Po...

Page 17: ...configuration This information is covered in more detail in the CVM1D Installation Guide 2 1 CPU Unit Switch Settings 12 2 2 Duplex Unit Switch Settings 14 2 3 EM Units 17 2 4 Memory Cards 18 2 4 1 M...

Page 18: ...g program ming but the switch settings described in this section may be required before starting operation 1 Protect Keyswitch 2 CPU DIP Switch 5 Memory Card power switch 6 Memory backup battery 4 Mem...

Page 19: ...M 6 ON ON Back up I O memory and DM 4 5 3 OFF Not used Leave this pin set to OFF 3 4 4 OFF Not used Leave this pin set to OFF 2 3 5 OFF Files are not transferred from the Memory Card automatically at...

Page 20: ...start the backup Refer to 2 4 3 Simplified Backup Function for details 6 Memory Backup Battery Verify that the backup battery is installed before operating the PC 2 2 Duplex Unit Switch Settings Some...

Page 21: ...his switch setting becomes effective when the power is turned on a CPU Usage Switch is switched from NO USE to CPU USE or the Initialize Button is pressed 3 Active CPU Switch In a duplex system this s...

Page 22: ...municate with PT Programmable Terminal via NT Link communications 4 OFF Host link communications governed by PC Set up Effective only when pin 3 is OFF ON Initializes host link communications specific...

Page 23: ...g diagram shows the structure of the EM Unit and identifies its main components Memory chip Pullout lever Backup capacitor EM Unit CPU connector The EM Area operates the same as the DM Area but the EM...

Page 24: ...r must be used to write data to EPROM Memory Cards The following commercially available memory cards can be used The proce dures and applications for using these memory cards is exactly the same as fo...

Page 25: ...een the CPU and Memory Card Memory Card files are identified by both their filename and filename extension The following table lists the filenames and filename extensions that are used with the PC Fil...

Page 26: ...then transfer the program file to the Memory Card from the PC Convert the program into an object file in offline SSS operations and then transfer it directly to the Memory Card in online operations I...

Page 27: ...to be sure that they are correct 3 Confirm that the CPU Unit is in PROGRAM mode 4 Confirm that the Memory Card is not being accessed from a Programming Device 5 Turn ON pin 5 on the CPU DIP switch 6 I...

Page 28: ...t be recognized by the CPU 2 6 I O Control Unit and I O Interface Unit Displays The I O Control Unit and I O Interface Unit have four character 7 segment dis plays on the front There are four display...

Page 29: ...mming Device is not connected Note Only one Programming Device can be connected to a CPU Unit or I O Interface Unit for each PC but three additional Programming De vices can be connected to the SYSMAC...

Page 30: ...y When an error has occurred that information takes priority Indicates the status of the right Power Supply Unit Normal operation Error occurred Abbreviation of Power Supply Indicates mode 4 Display M...

Page 31: ...tart Bits 46 3 6 6 SYSMAC BUS Error Check Bits 47 3 6 7 SSS Flags 47 3 6 8 Start up Time 47 3 6 9 Power Interruption Time 48 3 6 10 Number of Power Interruptions 48 3 6 11 Service Disable Bits 48 3 6...

Page 32: ...ror Flag 56 3 6 44 Jump Error Flag 56 3 6 45 Duplex Power Supply Error Flag 56 3 6 46 FAL Flag and FAL Number 56 3 6 47 Memory Error Area Location 56 3 6 48 Memory Card Start up Transfer Error Flag 56...

Page 33: ...timers normal high speed and totalizing and to access Completion Flags PV and SV Counter Area C0000 to C1023 Completion Flags 0F80 to 0FBF Present Values 1800 to 1BFF Used to define counters normal r...

Page 34: ...is combined with the bit number as a single four to six digit address The following table shows examples of this The two rightmost dig its of a bit address must indicate a bit between 00 and 15 e g th...

Page 35: ...01011101010111 which would be 5 757 hexadecimal or 22 359 in decimal 163 x 5 162 x 7 16 x 5 7 Because the numeric equivalent of each four BCD binary bits must be numeri cally equivalent to a decimal v...

Page 36: ...FFFF Positive signed binary data is identical to unsigned binary data up to 32 767 and can be converted using BIN 100 The following procedure converts nega tive decimal values between 32 768 and 1 to...

Page 37: ...s can be used as work bits Link Area Words CIO 1000 to CIO 1199 Bits CIO 100000 to CIO 119915 03E8 to 04AF These bits are used for SYSMAC NET Link and SYSMAC LINK Controller Link Systems Bits not used...

Page 38: ...s oper ands in instructions that control bit status e g the OUTPUT DIFFERENTIATE UP and KEEP instructions In other words input bits should be treated as read only bits Output bits are used to output p...

Page 39: ...previous Unit If there are any empty slots no words will be assigned to those slots Words are only assigned when a Unit is mounted all empty slots are skipped The numbers of I O words allocated to the...

Page 40: ...01 X 2 b The DIP switch on the Remote I O Slave Unit must be set to 54MH c The Special I O Unit must be one of the following AD101 CT012 CT041 ASC04 IDS01 V1 IDS02 IDS21 IDS22 LDP01 V1 or NC222 7 Ref...

Page 41: ...it Power Supply Unit Expansion I O Rack CIO 0017 CIO 0018 CIO 0019 CIO 0020 CIO 0021 CIO 0022 CIO 0023 Empty no allocation Empty no allocation Empty no allocation Power Supply Unit Power Supply Unit R...

Page 42: ...per formed and a Dummy I O Unit has been allocated the words designated by these settings it can be replaced at any time with a Unit that requires the same type and number of words e g if a Dummy I O...

Page 43: ...ter Word addresses are assigned to Units on Slave Racks in the order in which they are mounted left to right Refer to the SYSMAC BUS 2 Remote I O System Manual for details on word allocation to Slaves...

Page 44: ...Unit 8 9 10 11 12 13 14 15 CIO words 1700 to 1724 1725 to 1749 1750 to 1774 1775 to 1799 1800 to 1824 1825 to 1849 1850 to 1874 1875 to 1899 An additional1600 words in the DM Area D02000 to D03599 ar...

Page 45: ...has been registered or edited an I will appear before input bit addresses and a Q will appear before output bit addresses on SSS displays Refer to the SSS Operation Manuals for details on the PC Setu...

Page 46: ...e Memory Card Protect Switch 13 and 14 Not used 15 UM Protect Bit Prevents writing to Program Memory when turned ON Set with the System Protect Key Switch Calendar Clock Area The following table shows...

Page 47: ...rea word addresses range from A000 through A511 bit addresses from A00000 through A51115 Addresses A000 through A255 are read write but ad dresses A256 through A511 are read only The Force Set Reset o...

Page 48: ...used A018 to A089 00 to 15 Not used A090 to A097 00 to 15 Reserved for system use A098 00 FPD 177 Teaching Bit 01 to 15 Not used A099 00 to 07 Message 0 to 7 Flags 08 to 15 Not used A100 to A199 00 t...

Page 49: ...sed 09 Duplex CPU Replacement Enabled Flag 10 Duplex CPU Error Flag 11 Duplex CPU Memory Error Flag 12 to 15 Not used A395 00 to 15 Not used A396 00 to 11 Not used 12 Duplex Verification Error EM Size...

Page 50: ...SYSMAC BUS Error Flag 06 SYSMAC BUS 2 Error Flag 07 CPU Bus Unit Error Flag 08 Not used 09 I O Verification Error Flag 10 to 11 Not used 12 Indirect DM Error Flag 13 Jump Error Flag 14 Duplex Power Su...

Page 51: ...cle Time BCD 8 digits A464 to A465 00 to 15 Present Cycle Time BCD 8 digits A466 to A469 00 to 15 Not used A470 to A477 00 to 15 SYSMAC BUS Error Codes RM 0 A470 RM 1 A471 RM 2 A472 RM 3 A473 RM 4 A47...

Page 52: ...the IOM Hold Bit itself is preserved in the PC Setup Setting B IOM Hold Bit status then I O Memory is also pre served when the PC is turned ON or power is interrupted 3 6 2 Forced Status Hold Bit Bit...

Page 53: ...been established during execution of a Data or Program Trace with the SSS Bit A00812 is turned ON upon when the sampling of a region of trace memory has been completed during execution of a Data or P...

Page 54: ...peration is stopped Bits A01500 through A01515 can be turned ON to stop service to CPU Bus Units numbered 0 through 15 respectively Turn the appropriate bit OFF again to resume service to the CPU Bus...

Page 55: ...9 0014 The pointer value is in word A300 which is in the read only area words A256 to A511 Although each of them contains a different record the structure of each record is the same the first word con...

Page 56: ...Error has occurred Bit A30602 is ON when the PC is not running because there is a terminator mis sing in the SYSMAC BUS System Bit A30603 is ON when the PC is not running because a CPU Bus Unit is in...

Page 57: ...the card 3 6 21 Alternate CPU Unit Status Flags Bit A39409 is turned ON when the other CPU Unit can be removed or connected during duplex operation Bit A39410 is turned ON when there is a CPU error in...

Page 58: ...nsion I O Rack 5 Right Power Supply Unit Error Flag A39811 Expansion I O Rack 5 Left Power Supply Unit Error Flag A39812 Expansion I O Rack 6 Right Power Supply Unit Error Flag A39813 Expansion I O Ra...

Page 59: ...the CPU and CPU Bus Units or a WDT watchdog timer error occurs in a CPU Bus Unit The unit number of the CPU Bus Unit involved is contained in word A405 Bits A40500 through A40515 correspond to CPU Bus...

Page 60: ...in volved is written to word A427 Bits A42700 through A42715 correspond to CPU Bus Units 0 through 15 re spectively When a error occurs the bit corresponding to the unit number of the CPU Bus Unit inv...

Page 61: ...ayed 3 6 40 SYSMAC BUS 2 Error Flag and Master Unit Numbers Bit A40206 is turned ON when an error occurs during the transmission of data in the SYSMAC BUS 2 System The number of the Master involved is...

Page 62: ...of the error 3 6 46 FAL Flag and FAL Number Bit A40215 is turned ON when the FAL 006 instruction is executed The FAL number is then written to words A430 to A461 Bits from A43001 to A46115 cor respond...

Page 63: ...55 Arithmetic Flags The following flags are used in data shifting arithmetic calculation and compari son instructions They are generally referred to only by their two letter abbrevi ations Caution Th...

Page 64: ...ctions The instructions will never be executed 3 6 58 Clock Pulse Bits Four clock pulses are available to control program timing Each clock pulse bit is ON for the first half of the rated pulse time t...

Page 65: ...re not executed in the same cycle they will operate cor rectly There are no restrictions on the order in which timer numbers can be used Once defined a timer number can be designated as an operand in...

Page 66: ...letion Flags and PVs can be accessed directly with their internal I O memory addresses but they are normally accessed by using the counter numbers in the program 3 9 DM and EM Areas The DM Data Memory...

Page 67: ...f DM addresses that can be addressed indirectly is D00000 to D09999 If the content of D00100 is 0324 then D00100 indicates D00324 as the word that contains the desired data and the content of D00324 i...

Page 68: ...perand in an instruction with the prefix the instruction is performed on the word at the internal I O memory address indi cated by that Index Register as in the following example Word Content IR0 076C...

Page 69: ...tents of an Index Register by 1 or 2 after executing the instruction A suffix indicates an auto increment of 1 and a suffix indicates an auto increment of 2 An auto decrement decreases the contents of...

Page 70: ...sic Mnemonic Code 68 4 3 3 Ladder Instructions 69 4 3 4 OUTPUT and OUTPUT NOT 71 4 3 5 The END Instruction 72 4 4 Mnemonic Code 72 4 4 1 Logic Block Instructions 72 4 4 2 Coding Multiple Right hand In...

Page 71: ...gram and fine tune it if required The basics of ladder diagram programming and conversion to mnemonic code are described in 4 3 Basic Ladder Diagrams The rest of Section 4 covers more advanced program...

Page 72: ...dition indicates the operand bit for the instruction It is the status of the bit associated with each condition that determines the execution condition for fol lowing instructions Only these condition...

Page 73: ...ram or in mnemonic form i e as a list of code The mnemonic code provides exactly the same information as the ladder diagram You can pro gram directly in mnemonic code although it is not recommended fo...

Page 74: ...t the data column can be quickly scanned to see if any addresses have been left out When programming addresses are automatically displayed and do not have to be input unless for some reason a differen...

Page 75: ...rand bit If both of these are ON an ON execution condition will be produced for the next instruction If either is OFF the resulting execution condition will also be OFF Each AND NOT instruction in a s...

Page 76: ...T The simplest way to output the results of combining execution conditions is to output it directly with the OUTPUT and OUTPUT NOT These instructions are used to control the status of the designated o...

Page 77: ...structions do not correspond to specific conditions on the ladder diagram rather they describe relationships between logic blocks Each logic block is started with a LOAD or LOAD NOT instruction Whenev...

Page 78: ...shown to the right of the diagram The AND LOAD instruction requires no operands of its own because it operates on previously determined execution conditions Here too dashes are used to indicate that n...

Page 79: ...002 00003 OR 000003 00004 AND LD 00005 LD 000004 00006 OR 000005 00007 AND LD 00008 OUT 000500 Again with the second method a maximum of eight blocks can be combined There is no limit to the number of...

Page 80: ...0000 00 0005 01 0000 02 0000 03 0002 01 0000 04 Operands Although the following diagram is similar to the one above block b in the diagram below cannot be coded without separating it into two blocks...

Page 81: ...coded As shown below blocks a and b require an AND LOAD Before AND LOAD can be used however OR LOAD must be used to combine the top and bottom blocks on both sides i e to combine a1 and a2 b1 and b2 B...

Page 82: ...7 LD NOT 000006 00008 AND 000007 00009 OR LD 00010 OUT 000200 The following diagram requires five blocks which here are coded in order before using OR LOAD and AND LOAD to combine them starting from t...

Page 83: ...tion is used to combine the execution conditions re sulting from blocks a and b and the second one is to combine the execution condition of block c with the execution condition resulting from the norm...

Page 84: ...his In both diagrams instruction 1 is executed before returning to the branching point and moving on to the branch line leading to instruction 2 Instruction 2 00000 LD 000000 00001 AND 000001 00002 In...

Page 85: ...a TR bit TR0 Address Instruction 00000 LD 000000 00001 OUT TR0 00002 AND 000001 00003 Instruction 1 00004 LD TR0 00005 AND 000002 00006 Instruction 2 Operands 0000 00 0000 02 0000 01 Instruction 2 Ins...

Page 86: ...rogram can be reduced and ease of understanding a program increased by redrawing a diagram that would otherwise required TR bits In both of the following pairs of diagrams the bottom versions require...

Page 87: ...with an interlock Here the conditions leading up to the branching point are placed on an instruction line for the INTERLOCK instruction all of lines leading from the branching point are written as se...

Page 88: ...skipped according to a designated execu tion condition Although this is similar to what happens when the execution condition for an INTERLOCK instruction is OFF with jumps the operands for all instruc...

Page 89: ...nstruction 00000 LD 000000 00001 JMP 004 0001 00002 LD 000001 00003 Instruction 1 00004 LD 000002 00005 JMP 004 0001 00006 LD 000003 00007 AND NOT 000004 00008 Instruction 2 00009 LD 000005 00010 Inst...

Page 90: ...ode Address Instruction 00000 LD 000000 00001 DIFU 013 000200 Operands 00002 LD 000001 00003 DIFD 014 000200 013 DIFU 000200 014 DIFD 000200 0000 00 0000 01 Here CIO 000200 will be turned ON for one s...

Page 91: ...7 4 Self maintaining Bits Seal Although the KEEP instruction can be used to create self maintaining bits it is sometimes necessary to create self maintaining bits in another way so that they can be tu...

Page 92: ...bed above I O bits and other dedicated bits cannot be used as works bits All bits in the I O Memory that are not allocated as I O bits are available for use as work bits Be careful to keep an accurate...

Page 93: ...bits can also be used if differential treatment is necessary for some but not all of the conditions required for execution of an instruction In this exam ple CIO 000100 must be left ON continuously as...

Page 94: ...gned to conditions is not lim ited so use them as many times as required to simplify your program Often complicated programs are the result of attempts to reduce the number of times a bit is used Exce...

Page 95: ...ingly as it moves down the bus bar It is important that instructions be placed in the proper order so that for example the desired data is moved to a word before that word is used as the operand for a...

Page 96: ...regarded as 16 bit binary data with the leftmost bit i e the most significant bit or MSB used as the sign bit Signed binary data is often written as four digits hexadecimal When the leftmost bit is O...

Page 97: ...solute value into 2 s complement then reverse the bits and add one The hexadecimal range is 0000 to 7FFF for a positive number and 8000 to FFFF for a negative number These are equivalent in decimal to...

Page 98: ...OUBLE SIGNED BINARY SUBTRACT WITH CARRY Multiplication 420 SIGNED BINARY MULTIPLY p L 421 DOUBLE SIGNED BINARY MULTIPLY Division 430 SIGNED BINARY DIVIDE L 431 DOUBLE SIGNED BINARY DIVIDE Comparison S...

Page 99: ...ndled as 8 digit BCD data with a decimal range of 0 to 99 999 999 4 12 4 Signed BCD Data Signed BCD data is a formatted in special data patterns in order to express neg ative numbers for 16 bit word d...

Page 100: ...6 1 LOAD LOAD NOT AND AND NOT OR and OR NOT 107 5 6 2 CONDITION ON OFF UP 018 and DOWN 019 109 5 6 3 BIT TEST TST 350 and TSTN 351 110 5 6 4 NOT NOT 010 111 5 6 5 AND LOAD and OR LOAD 111 5 7 Bit Con...

Page 101: ...TO REGISTER MOVR 036 181 5 15 8 MOVE QUICK MOVQ 037 182 5 15 9 MULTIPLE BIT TRANSFER XFRB 038 183 5 15 10 BLOCK TRANSFER XFER 040 185 5 15 11 BLOCK SET BSET 041 186 5 15 12 MOVE BIT MOVB 042 187 5 15...

Page 102: ...52 5 19 4 BINARY DIVIDE DVB 083 253 5 19 5 DOUBLE BINARY ADD ADBL 084 254 5 19 6 DOUBLE BINARY SUBTRACT SBBL 085 255 5 19 7 DOUBLE BINARY MULTIPLY MLBL 086 256 5 19 8 DOUBLE BINARY DIVIDE DVBL 087 257...

Page 103: ...PID CONTROL PID 270 317 5 24 2 LIMIT CONTROL LMT 271 326 5 24 3 DEAD BAND CONTROL BAND 272 327 5 24 4 DEAD ZONE CONTROL ZONE 273 328 5 25 Logic Instructions 330 5 25 1 LOGICAL AND ANDW 130 330 5 25 2...

Page 104: ...O READ READ 190 377 5 33 2 I O READ 2 RD2 280 379 5 33 3 I O WRITE WRIT 191 381 5 33 4 I O WRITE 2 WR2 281 383 5 34 Network Instructions 385 5 34 1 DISABLE ACCESS IOSP 187 385 5 34 2 ENABLE ACCESS IOR...

Page 105: ...se address is designated as an operand is called an operand word In some instructions the word address designated in an instruction indicates the first of multiple words containing the desired data Ea...

Page 106: ...an error and the instruc tion would not be executed Variations j BCMP 022 022 BCMP S CB R CB 1st block word CIO G A T C DM R Result word CIO G A T C DM DR IR S Source data CIO G A T C DM DR IR Operand...

Page 107: ...PC Setup specified from the SSS The PC Setup can be used to specify whether the content of a word containing an indirect address contains the BCD data area address or contains the binary hexadecimal P...

Page 108: ...ons are provided in both non differentiated and differentiate up forms and some instructions are also provided with a differentiate down form Differentiated instructions are distinguished by an up or...

Page 109: ...same regardless of whether the differentiated or non differentiated form of an instruction is used When inputting the same function codes are also used Operation of differentiated instructions can be...

Page 110: ...and per line and in the same order as they appear in the ladder symbol for the instruction The address and instruction columns of the mnemonic code table are filled in for the instruction word only Fo...

Page 111: ...lines all of the lines for the instruction are entered before the right hand instruction when inputting in mne monic form although this is not always true when inputting using ladder dia grams Each l...

Page 112: ...ructions alone 5 6 1 LOAD LOAD NOT AND AND NOT OR and OR NOT LOAD LD B Bit CIO G A T C Operand Data Area Ladder Symbols Mnemonics LD j LD j LD i LD i LD LD B B B B B B LOAD NOT LD NOT B Bit CIO G A T...

Page 113: ...he execution condition and the status of its bit operand OR NOT the logical OR between the execution condition and the inverse of the sta tus of its bit operand These six instructions use only one wor...

Page 114: ...structions because the execution condition may remain ON for more than one scan Refer to 5 8 INTERLOCK and INTER LOCK CLEAR IL 002 and ILC 003 5 9 JUMP and JUMP END JMP 004 and JME 005 and 5 30 Subrou...

Page 115: ...ht hand instructions i e anoth er instruction must appear between them and the right bus bar N must be BCD between 0000 and 0015 Note Refer to page 101 for general precautions on operand data areas Fl...

Page 116: ...F 000502 ON ON ON ON OFF OFF OFF OFF 000505 OFF OFF OFF ON ON ON ON ON 5 6 5 AND LOAD and OR LOAD AND LOAD AND LD OR LOAD OR LD Ladder Symbol 000002 000003 000000 000001 Ladder Symbol 000000 000001 00...

Page 117: ...designated bit for a OFF execution condition and turns OFF the designated bit for an ON execution condition OUT and OUT NOT can be used to control execution by turning ON and OFF bits that are assign...

Page 118: ...ted bit If the previous execu tion condition was OFF and the current execution condition is either ON or OFF DIFD 014 will either turn the designated bit OFF or leave it OFF The desig nated bit will t...

Page 119: ...0000 LD 000000 00001 DIFU 013 022500 00002 LD 022500 00003 MOVQ 037 1200 A001 Note UP 018 and DOWN 019 can also be used to control differentiated execution of instructions Refer to page 109 for detail...

Page 120: ...t affect the status of the operand bit when the execution condition is OFF The operation of SET 016 differs from that of OUT because the OUT instruction turns the operand bit OFF when its execution co...

Page 121: ...48 047 SETA D N1 N2 Operand Data Area Ladder Symbol Variations SETA 047 RSTA 048 048 RSTA D N1 N2 N1 Beginning bit CIO G A T C DM DR IR N2 Number of bits CIO G A T C DM DR IR D Rightmost word for set...

Page 122: ...tion When CIO 000001 turns ON in the second instruction line the eight bits begin ning with bit 12 in CIO 0010 are all turned OFF Address Instruction Operands 00000 LD 000000 00001 SETA 047 0005 0008...

Page 123: ...labeled S and R S is the set input R the reset input KEEP 011 operates like a latching relay that is set by S and reset by R When S turns ON the designated bit will go ON and stay ON until reset rega...

Page 124: ...D 000000 00003 AND 000001 00004 KEEP 011 000001 Address Instruction Operands Note Immediate refresh variations can be used in simplex mode only they cannot be used in duplex mode Precautions Any outpu...

Page 125: ...IOM Hold Bit and setting IOM Hold Bit Hold in the PC Setup If the IOM Hold Bit is not specified to be held in the PC Setup all I O Area bits will be turned OFF when the power is turned ON Be sure to r...

Page 126: ...n condition that existed before the interlock became effective i e before the interlock condition for IL 002 went OFF The ladder diagram and bit status changes for a DIFU 013 instruc tion in an interl...

Page 127: ...and JUMP END JMP 004 and JME 005 JUMP JMP 004 004 JMP N N Jump number CIO G A T C DM DR IR Operand Data Area Ladder Symbol JUMP END JME 005 005 JME N N Jump number Operand Data Area Ladder Symbol Des...

Page 128: ...cuted in an jumped section immediately after the execution condition for the JMP 004 has gone ON the execution condition for the DIFU 013 DIFD 014 or differen tiated instruction will be compared to th...

Page 129: ...ile jumped the Completion Flag is turned ON when the exe cution condition for JMP 004 goes ON ACCUMULATIVE TIMER TTIM 120 Count incrementing continues while the tim er s execution condition is ON but...

Page 130: ...Over error Flags ER A50003 Content of DM word is not BCD when set for BCD Jump number is not BCD or not between 0000 and 0999 JMP 004 in the program without a corresponding JME 005 Also turns ON the J...

Page 131: ...D 001 is required as the last instruction in any program No instruction writ ten after END 001 will be executed The END 001 instruction indicates the end of the entire ladder program for that cycle If...

Page 132: ...present value and Completion Flag of the counter Set Values A timer or counter SV can be input as a constant or as a word address in a data area If an I O Area word assigned to an Input Unit is design...

Page 133: ...indirect addressing to define and start 100 timers with SVs contained in D00100 through D00199 IR0 contains the PC memory address of the timer PV and IR1 contains the PC memory address of the timer Co...

Page 134: ...000 00003 OUT 200000 00004 LD NOT 200001 00005 TIM 0001 D00101 00006 LD T0001 00007 OUT 200001 00008 LD NOT 200002 00009 TIM 0002 D00102 00010 LD T0002 00011 OUT 200002 00396 LD NOT 200602 00397 TIM 0...

Page 135: ...condition went ON If the SV elapsed while the timer was jumped the timer s Completion Flag will be turned ON when the execution condition for JMP 004 is turned ON again Precautions SV must be between...

Page 136: ...h two 900 0 second 15 minute timers combined to func tionally form a 30 minute timer is shown below Address Instruction 00000 LD 000000 00001 TIM 0001 9000 00002 LD T0001 00003 TIM 0002 9000 00004 LD...

Page 137: ...d by combining TIM with OUT or OUT NOT The following diagram demonstrates how this is possible In this example 000204 would remain ON for 1 5 seconds after 000000 goes ON regardless of the time 000000...

Page 138: ...OFF times must be the same and they depend on the clock pulse bits available in the Auxiliary Area In the following example the 1 second clock pulse is used A50102 so that 000206 would be turned ON an...

Page 139: ...jumped the timer s Completion Flag will be turned ON when the execution condition for JMP 004 is turned ON again Precautions SV must be between 00 02 and 99 99 and must be BCD The decimal point is no...

Page 140: ...VE TIMER TTIM 120 120 TTIM N S S Set value CIO G A T C DM DR IR Refer to page 128 for details on indirectly addressing timers N Timer number Operand Data Areas Ladder Symbol I R Description A TTIM 120...

Page 141: ...When the execution condition for JMP 004 is changed to ON the timer will continue incrementing from the time that elapsed while TTIM 120 was jumped Precautions SV must be between 000 0 and 999 9 and m...

Page 142: ...M1D and C CVM1 CV series PCs ex cept for the timer precision and PV refreshing in jumped program sections 1 2 3 1 Timer Precision TIML 121 instruction errors can be one cycle time or more up to two cy...

Page 143: ...l turn ON If CIO 000000 turns OFF the PV will again be set to the SV Address Instruction 00000 LD 000000 00001 TIML 121 0150 0100 00864000 121 TIML 0150 0100 00864000 0000 00 Operands The following fi...

Page 144: ...8 07 06 05 04 03 02 01 00 Completion Flags for SVs in S through S 7 Bit 0n contains the Flag for the SV in S n Pause Bit Reset Bit D1 Operation of MTIM 122 is the same in CVM1D and C CVM1 CV series PC...

Page 145: ...CIO 0003 2 5 0 6 CIO 005001 S 2 CIO 0004 1 0 2 9 CIO 005002 S 3 CIO 0005 6 0 4 7 CIO 005003 S 4 CIO 0006 4 1 0 6 CIO 005004 S 5 CIO 0007 7 9 1 0 CIO 005005 S 6 CIO 0008 1 0 5 0 CIO 005006 S 7 CIO 0009...

Page 146: ...e used to define only one counter instruction unless the counters are never ac tive simultaneously The CNT and CNTR 012 counters use counter numbers Note Refer to page 101 for general precautions on o...

Page 147: ...r resetting both C0001 and C0002 when it is OFF The Completion Flag for C0002 is also used to reset C0001 to inhibit C0001 operation once the SV for C0002 has been reached and until the entire extende...

Page 148: ...D NOT 010000 00005 AND NOT C0002 00006 TIM 0001 0050 00007 LD T0001 00008 OUT 010000 00009 LD C0002 00010 OUT 000200 Address Instruction Operands CNT 0002 0100 CP R 0000 00 TIM 0001 0050 0100 C0002 01...

Page 149: ...ed ON until the PV is decremented again When incremented above SV the PV is set to 0000 and the Completion Flag is turned ON until the PV is incremented again CNTR 012 is reset with a reset input R Wh...

Page 150: ...9 CIO 00003 CIO 00004 Completion Flag C00007 5 13 8 RESET TIMER COUNTER CNR 236 236 CNR D1 D2 D2 Second Word CIO G A T C DM D1 First Word CIO G A T C DM Operand Data Areas Ladder Symbol Variations jCN...

Page 151: ...fer to page 101 for general precautions on operand data areas Flags ER A50003 Content of DM word is not BCD when set for BCD Example The CNR 236 instruction in the example below resets timers T0001 to...

Page 152: ...FT 050 was executed If execution condition P has not changed or has gone from ON to OFF the shift register will remain unaffected St designates the rightmost word of the shift register E designates th...

Page 153: ...DIFU 013 012800 00007 LD 012800 00008 JMP 004 0000 00009 LD 012800 00010 OUT 020100 00011 JME 005 0000 Address Instruction Operands 050 SFT 0200 0201 0002 00 0002 01 0002 02 0002 03 013 DIFU 012800 00...

Page 154: ...ute so that the pusher output and bit 120003 of the shift register can be reset as required Sensor Chute 00002 00500 Sensor 00001 Rotary Encoder 00000 Pusher 050 SFT 1200 1201 00000 LD 000001 00001 LD...

Page 155: ...rection indicated by bit 12 shifting one bit out to CY and the status of bit 13 into the other end when ever SFTR 051 is executed with an ON execution condition as long as the reset bit is OFF and as...

Page 156: ...A DM DR IR E End word CIO G A DM St Starting word CIO G A DM Description When the execution condition is OFF ASFT 052 is not executed When the ex ecution condition is ON ASFT 052 is used to create an...

Page 157: ...oward E 6000 Shift non zero data toward St 8000 Reset all words to zero St must be less than or equal to E St and E must be in the same data area Note Refer to page 101 for general precautions on oper...

Page 158: ...be completed if a power interruption occurs during execution of the instruction Note Refer to page 101 for general precautions on operand data areas Flags ER A50003 Content of DM word is not BCD when...

Page 159: ...e copied to CY and the status of the beginning bit C will not be changed Set the beginning bit to a value from 0000 to 0015 BCD CY D Wd C bit N bits 0 D Wd Precautions C must be between 0000 and 0015...

Page 160: ...of bits i e the shift data length from the beginning bit of the beginning word bit C of word D one bit to the right A 0 is entered for the beginning bit The status of the Nth bit is shifted to CY A500...

Page 161: ...BITS LEFT NASL 056 056 NASL D C Operand Data Areas Ladder Symbol NASL Variations NASL 056 D Shift word CIO G A DM DR IR C Control word CIO G A T C DM DR IR When the execution condition is OFF NASL 056...

Page 162: ...all zeros N A50008 Same status as leftmost bit MSB of word D after shift Example See the example provided in 5 14 9 DOUBLE SHIFT N BITS LEFT NSLL 058 5 14 8 SHIFT N BITS RIGHT NASR 057 057 NASR D C O...

Page 163: ...ros N A50008 Same status as leftmost bit MSB of word D after shift Example See the example provided in 5 14 10 DOUBLE SHIFT N BITS RIGHT NSRL 059 5 14 9 DOUBLE SHIFT N BITS LEFT NSLL 058 058 NSLL D C...

Page 164: ...perand data areas Flags ER A50003 Number of bits to shift is out of range Content of a DM word is not BCD when set for BCD CY A50004 1 has been shifted to CY EQ A50006 Content of words D and D 1 after...

Page 165: ...e number of bits shifted beginning with the leftmost bit of the specified word will be set to 0 or to the status of the MSB depending on the control word setting Number of bits to shift 00 to 32 Contr...

Page 166: ...A50003 Content of DM word is not BCD when set for BCD CY A50004 Receives the status of bit 15 EQ A50006 Content of Wd is 0 after a shift N A50008 Same status as bit 15 of D 1 after shift Example When...

Page 167: ...Y 0 Flags ER A50003 Content of DM word is not BCD when set for BCD CY A50004 Receives the status of bit 00 EQ A50006 Content of Wd is 0 after a shift N A50008 OFF Example When CIO 000000 is ON in the...

Page 168: ...L 062 Note Refer to page 101 for general precautions on operand data areas Flags ER A50003 Content of DM word is not BCD when set for BCD CY A50004 Receives the status of bit 15 from Wd EQ A50006 Cont...

Page 169: ...R 063 Note Refer to page 101 for general precautions on operand data areas Flags ER A50003 Content of DM word is not BCD when set for BCD CY A50004 Receives the status of bit 15 from Wd EQ A50006 Cont...

Page 170: ...t 15 from Wd 1 EQ A50006 Content of Wd and Wd 1 are 0 after a shift N A50008 Same status as bit 15 of Wd 1 after shift Example When CIO 000000 is ON in the following example 0 is shifted into bit 00 o...

Page 171: ...us of bit 00 from Wd EQ A50006 Content of Wd and Wd 1 are 0 after a shift N A50008 Same status as bit 15 of Wd 1 after shift Example When CIO 000000 is ON in the following example 0 is shifted into bi...

Page 172: ...is not BCD when set for BCD CY A50004 Receives the status of bit 15 from Wd 1 EQ A50006 Content of Wd and Wd 1 are 0 after execution N A50008 Same status as bit 15 of Wd 1 after execution Example When...

Page 173: ...word is not BCD when set for BCD CY A50004 Receives the status of bit 15 from Wd EQ A50006 Content of Wd is 0 after execution N A50008 Same status as bit 15 of Wd after execution Example When CIO 000...

Page 174: ...d 1 EQ A50006 Content of Wd and Wd 1 are 0 after execution N A50008 Same status as bit 15 of Wd 1 after execution Example When CIO 000000 is ON in the following example the status of bit 15 of CIO 010...

Page 175: ...not BCD when set for BCD CY A50004 Receives the status of bit 00 from Wd EQ A50006 Content of Wd and Wd 1 are 0 after execution N A50008 Same status as bit 15 of Wd 1 after execution Example When CIO...

Page 176: ...of DM word is not BCD when set for BCD CY A50004 Receives the status of bit 15 from Wd EQ A50006 Content of Wd is 0 after execution N A50008 Same status as bit 15 of Wd after execution Example When CI...

Page 177: ...Wd EQ A50006 Content of Wd and Wd 1 are 0 after execution N A50008 Same status as bit 15 of Wd 1 after execution Example When CIO 000000 is ON in the following example the status of bit 00 of CIO 0800...

Page 178: ...word is not BCD when set for BCD St and E are in different areas or St is greater than E Example When CIO 000000 is ON in the following example 0 is shifted into digit 0 of D00010 the contents of all...

Page 179: ...BCD when set for BCD The St and E words are in different areas or St is greater than E Example When CIO 000000 is ON in the following example 0 is shifted into digit 3 of D00012 the contents of all di...

Page 180: ...refreshed just be fore and output bits used for D will be refreshed just after execution Note The immediate refresh variations of MOV 030 can be used in simplex mode only they cannot be used in duplex...

Page 181: ...n D is turned ON Source word Destination word Bit status inverted Flags ER A50003 Content of DM word is not BCD when set for BCD EQ A50006 Content of D is 0 after execution N A50008 Same status as bit...

Page 182: ...te Refer to page 101 for general precautions on operand data areas Flags ER A50003 Content of DM word is not BCD when set for BCD EQ A50006 Content of D and D 1 are 0 after execution N A50008 Same sta...

Page 183: ...Bit status inverted Refer to page 101 for general precautions on operand data areas Flags ER A50003 Content of DM word is not BCD when set for BCD EQ A50006 Content of D and D 1 are 0 after execution...

Page 184: ...words use XCGL 035 and or XCHG 034 and use work words as an intermediate buffer to hold one of the blocks Data 2 Data 1 Buffer Step 1 Step 2 Step 3 Flags ER A50003 Content of DM word is not BCD when s...

Page 185: ...buffer to hold one of the blocks Data 2 Data 1 Buffer Step 1 Step 2 Step 3 Refer to page 101 for general precautions on operand data areas Flags ER A50003 Content of DM word is not BCD when set for B...

Page 186: ...0 If the index register contains a PC memory address for a timer counter Comple tion Flag a Transition Flag or a Step Flag the leftmost three digits indicate the PC memory word address and the rightmo...

Page 187: ...tion word Bit status not changed Flags There are no flags affected by MOVQ 037 Example When CIO 000000 is ON in the following example 5A00 is copied into CIO 0000 Address Instruction Operands 00000 LD...

Page 188: ...decimal 0 to F in the control word C The number of bits to be transferred can be speci fied within a range of 0 to 255 in hexadecimal 00 to FF If 0 is specified no data will be transferred Number of b...

Page 189: ...D00200 D00500 Number of bits transferred 8 bits Example 2 When CIO 000000 is ON in the following example 24 bits beginning with bit 12 of D00200 are transferred to D00500 beginning with bit 08 as spec...

Page 190: ...must be in the same data area as must D and D N N must be BCD Note 1 Transfer source and destination words can overlap so XFER 040 can be used for word shift operations 2 Refer to page 101 for general...

Page 191: ...St 2 3 4 5 2 E 3 4 5 BSET 041 can be used to change timer counter PV BSET 041 can also be used to clear sections of a data area i e the DM area to prepare for executing other instructions St must be l...

Page 192: ...042 042 MOVB S C D Operand Data Areas Ladder Symbol Variations MOVB 042 S Source word or data CIO G A DM DR IR C Control word CIO G A T C DM DR IR D Destination word CIO G A DM DR IR When the executio...

Page 193: ...ddress Instruction Operands 00000 LD 000000 00001 MOVB 042 D00000 0035 0005 Specifies bit 12 of word 0005 Specifies bit 02 of word D00000 0 000500 000502 00504 000506 000507 000508 000509 0005I0 00051...

Page 194: ...ignated number of digits If the last digit is reached in either S or D further digits are used starting back at digit 0 First digit in S 0 to 3 Number of digits 0 to 3 0 1 digit 1 2 digits 2 3 digits...

Page 195: ...S to DBs Of i e Of is added to DBs to determine the destination word 2 DBs Of 3 4 5 2 S 3 4 5 Of must be BCD Note Refer to page 101 for general precautions on operand data areas Flags ER A50003 Of is...

Page 196: ...be BCD Note Refer to page 101 for general precautions on operand data areas Flags ER A50003 Of is not BCD Content of DM word is not BCD when set for BCD EQ A50006 Content of S is 0 N A50008 Same statu...

Page 197: ...Word Contents Number of words transferred 1 to 32 766 Dest bank no Source bank no Bank no 0 to 7 x103 x102 x101 x100 x104 0 0 0 Precautions The source and destination words can both be in same data ar...

Page 198: ...and outputs the re sult to the GR EQ and LE Flags in the Auxiliary Area If CMP 020 is used any input bits used for Cp1 and Cp2 are refreshed just be fore execution The immediate refresh variations of...

Page 199: ...of TR 0 unnecessary With this type of programming bits 000200 000201 and 000202 are changed only when CMP 020 is executed 00000 LD 000000 00001 CMP 020 0010 1209 00002 OUT TR0 00003 AND A50005 00004...

Page 200: ...G A T C DM Operand Data Areas Ladder Symbol 021 CMPL Cp1 Cp2 When the execution condition is OFF CMPL 021 is not executed When the ex ecution condition is ON CMPL 021 compares the eight digit content...

Page 201: ...T C DM R Result word CIO G A T C DM DR IR S Source data CIO G A T C DM DR IR Operand Data Areas Ladder Symbol When the execution condition is OFF BCMP 022 is not executed When the execution condition...

Page 202: ...ng each scan when CIO 000000 is ON S 0001 Lower limits Upper limits R 1205 0001 0210 1210 0000 1211 0100 120500 0 1212 0101 1213 0200 120501 0 1214 0201 1215 0300 120502 1 1216 0301 1217 0400 120503 0...

Page 203: ...ords Note Refer to page 101 for general precautions on operand data areas Flags ER A50003 Content of DM word is not BCD when set for BCD EQ A50006 Content of R is zero after execution The following ex...

Page 204: ...ntents are not equal bit n of R is turned OFF TB1 and TB2 cannot be one of the last 15 words in a data area because they designate the first of 16 words Note Refer to page 101 for general precautions...

Page 205: ...intermediate instruction like NOT 010 CMP 020 and CMPL 021 Intermediate instructions are entered between conditions or be tween a condition and a right hand instruction Intermediate instructions canno...

Page 206: ...ve to the next instruction line A total of 24 input comparison instructions are available These can be input us ing various combinations of symbols and options If no options are specified the comparis...

Page 207: ...ed between them and the right bus bar Note Refer to page 101 for general precautions on operand data areas Example 310 When CIO 000000 is ON in the following example the contents of D00100 and D00200...

Page 208: ...the ex ecution condition is ON CPS 026 compares constants and or the contents of specified words as signed 16 bit binary data and changes the status of compari son flags according to the results After...

Page 209: ...t of DM word is not BCD when set for BCD GR A40213 EQ A50006 LE A50007 Refer to tables above Example When CIO 000000 is ON in the following example the content of D00002 and D00001 is compared with th...

Page 210: ...S2 Ladder Symbol Operand Data Areas S1 First comparison word 1 CIO G A T C DM S2 First comparison word 2 CIO G A T C DM When the execution condition is OFF CMPL 029 is not executed When the ex ecutio...

Page 211: ...ll turn ON Address Instruction Operands 00000 LD 000000 00001 CMPL 029 0010 0008 00002 AND A50005 00003 OUT 002000 00004 AND A50006 00005 OUT 00201 00006 AND A50007 00007 OUT 002002 1234 S1 1 0011 ABC...

Page 212: ...quivalent binary bits and outputs the binary value to R Only the con tent of R is changed the content of S is left unchanged S R BCD Binary BIN 100 can be used to convert BCD to binary so that display...

Page 213: ...ng Device will appear in decimal rather than hexadecimal It can also be used to convert to BCD to perform BCD arithmetic operations rather than binary arith metic operations e g when BCD and binary va...

Page 214: ...When the execution condition is ON BINL 102 converts an 8 digit BCD number in S and S 1 into 32 bit binary data and outputs the converted data to R and R 1 S 1 S R 1 R BCD Binary S and S 1 must be BCD...

Page 215: ...he converted data to R and R 1 S 1 S R 1 R BCD Binary If the content of S exceeds 05F5E0FF the converted result will exceed 99999999 BCDL 103 will not be executed and the Error Flag A50003 will be tur...

Page 216: ...as subtracting S from 0000 and outputting the result to R Refer to page 101 for general precautions on operand data areas Flags ER A50003 Content of DM word is not BCD when set for BCD EQ A50006 Conte...

Page 217: ...the result to R and R 1 Refer to page 101 for general precautions on operand data areas Flags ER A50003 Content of DM word is not BCD when set for BCD EQ A50006 Content of S and S 1 is 0 the content...

Page 218: ...urce word S 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 The content of S is transferred as is to R 1st result word R 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2nd result word R 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 If bit 15 o...

Page 219: ...1 of S i e here Di would be 0001 Source word First result word C 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 Bit C i e bit number 12 turned ON For 8 bit conversion MLPX 110 converts up to two 8 bit digits from S...

Page 220: ...0010 S S S Some example Di values and the digit to word conversions that they produce are shown below for 8 bit conversion 0 1 R R 1 etc R 15 R 16 R 17 etc R 31 S Di 1011 Di 1010 0 1 R R 1 etc R 15 R...

Page 221: ...07 1 23 07 0 07 0 07 0 Bit 08 0 20 08 0 08 0 08 0 Bit 09 1 21 2 09 0 09 0 09 0 Bit 10 1 22 10 0 10 0 10 0 Bit 11 0 23 11 0 11 0 11 0 Bit 12 0 20 12 0 12 0 12 0 Bit 13 0 21 3 13 0 13 0 13 0 Bit 14 0 2...

Page 222: ...hexadecimal value corresponding to the bit number of the highest ON bit then transfers the hexadecimal value to the specified 8 bit digit in R The first digit to receive the results is specified in Di...

Page 223: ...2 3 Di 0032 R Di 0013 0 1 2 3 S S 1 R Some example Di values and the digit to word conversions that they produce are shown below for 256 bit conversion 0 1 R R 1 etc R 15 R 16 R 17 etc R 31 S Di 1011...

Page 224: ...rce word CIO G A T C DM DR IR D 1st destination word CIO G A DM Di Digit designator CIO G A T C DM DR IR When the execution condition is OFF SDEC 112 is not executed When the execution condition is ON...

Page 225: ...versions that they produce are shown below 0 1 2 3 S digits Di 0011 D 0 1 2 3 Di 0030 S digits 0 1 2 3 Di 0130 S digits Di 0112 0 1 2 3 S digits 1st half 2nd half D 1st half 2nd half D 1 1st half 2nd...

Page 226: ...3 Di 1 Second digit 0 One digit 0 Bits 00 through 07 Not used a b c d e f g Bit 00 Bit 07 8 Original data Converted code segments Display Digit Bits g f e d c b a 0 0 0 0 0 0 0 1 1 1 1 1 1 1 0 0 0 1 0...

Page 227: ...of D to re ceive the first ASCII code rightmost or leftmost eight bits are designated in Di If multiple digits are designated they will be placed in order starting from the des ignated half of D each...

Page 228: ...be B1 10110001 parity bit turned ON to create an even num ber of ON bits ASCII 36 00110110 will be 36 00110110 parity bit turned OFF because the number of ON bits is already even The status of the pa...

Page 229: ...R Result word CIO G A T C DM DR IR N Number of words CIO G A T C DM DR IR Operand Data Areas Ladder Symbol When the execution condition is OFF BCNT 114 is not executed When the execution condition is...

Page 230: ...source word CIO G A T C DM D Destination word CIO G A DM DR IR Bi Bit designator CIO G A T C DM DR IR When the execution condition is OFF LINE 115 is not executed When the execution condition is ON L...

Page 231: ...DM DR IR D 1st destination word CIO G A DM When the execution condition is OFF COLM 116 is not executed When the execution condition is ON COLM 116 copies the 16 bits of word S 00 to 15 to bit Bi of t...

Page 232: ...o hexadecimal data and outputs the results to a specified destination word The ASCII range that can be converted is the numerals 0 through 9 30 through 39 and the capital letters A through F 41 throug...

Page 233: ...it 1 Digit 0 0 3 1 Di Word Contents Example 3 Leftmost 8 bits Rightmost 8 bits Leftmost 8 bits Word S 1 Word S Word D 1 Rightmost 8 bits Leftmost 8 bits Word S 2 Parity 0 None With no parity data can...

Page 234: ...1 0 1 1 1 7 0 1 1 1 38 P 0 1 1 1 0 0 0 8 1 0 0 0 39 P 0 1 1 1 0 0 1 9 1 0 0 1 41 P 1 0 0 0 0 0 1 A 1 0 1 0 42 P 1 0 0 0 0 1 0 B 1 0 1 1 43 P 1 0 0 0 0 1 1 C 1 1 0 0 44 P 1 0 0 0 1 0 0 D 1 1 0 1 45 P...

Page 235: ...NS 275 converts the data in a specified source word S from signed BCD to signed binary and outputs the result to a specified destination word D The format of the source word is determined by the con t...

Page 236: ...Negative Flag A50008 will turn ON In order to convert a 2 s complement to the true value it is necessary to subtract it from 0 Refer to page 101 for general precautions on operand data areas Flags ER...

Page 237: ...scription When the execution condition is OFF BCDS 276 is not executed When the execution condition is ON BCDS 276 converts the data in a specified source word S from signed binary to signed BCD and o...

Page 238: ...If the check is okay the signed binary data in word S is converted to BCD and output to the designated word D If the check is not okay the Error Flag A50003 will turn ON and the instruction will not b...

Page 239: ...of the source word is determined by the contents of the control word C Note Special I O Units sometimes output signed BCD data Calculations using this data will normally be easier if it is first conv...

Page 240: ...alue it is necessary to subtract it from 0 Refer to page 101 for general precautions on operand data areas Flags ER A50003 Data format is 0002 and the leftmost digit is A to E Data format is 0003 and...

Page 241: ...sometimes sometimes require input of signed BCD data BCDS 276 or BDSL 278 can be used to easily convert signed binary data to signed BCD data The output data format and range designations for the vari...

Page 242: ...okay the double signed binary data in D00101 and D00100 is converted to BCD and output to D00201 and D00200 Address Instruction Operands 00000 LD 000000 00001 BDSL 278 0003 D00100 D00200 Double signed...

Page 243: ...ry flag CVM1D CPUs support add subtract and rotation shift instructions that do not use the carry flag in their operations These instructions do not require STC 078 and CLC 079 and reduce the number o...

Page 244: ...for this purpose 5 18 4 BCD SUBTRACT SUB 071 Variations j SUB 071 071 SUB Mi Su R Operand Data Areas Ladder Symbol Mi Minuend word CIO G A T C DM DR IR R Result word CIO G A DM DR IR Su Subtrahend wo...

Page 245: ...OFF when the program is re scanned In this example differentiated forms of SUB 071 are used so that the subtrac tion operation is performed only once each time CIO 000002 turns ON When another subtra...

Page 246: ...R and R 1 Md Mr R 1 R X Note An equivalent symbol math instruction B 424 is also available Md and Mr must be BCD Note Refer to page 101 for general precautions on operand data areas Flags ER A50003 Co...

Page 247: ...is also available Dd and Dr must be BCD Note Refer to page 101 for general precautions on operand data areas Flags ER A50003 Content of Dd or Dr is not BCD Content of DM word is not BCD when set for...

Page 248: ...50003 Content of Au or Ad is not BCD Content of DM word is not BCD when set for BCD CY A50004 There is a carry in the result EQ A50006 The result is 0 When CIO 000003 is ON the following program adds...

Page 249: ...f the result is negative CY is set and the 10 s complement of the actual result is placed in R To convert the 10 s complement to the true result subtract the content of R from zero Mi 1 Mi Su 1 Su R 1...

Page 250: ...action Turned ON to indicate nega tive result Address Instruction Operands 079 CLC 075 SUBL 1220 1200 D00100 041 BSET 0000 D00000 D00001 079 CLC 075 SUBL D00000 D00100 D00100 0000 03 A500 04 A500 04 1...

Page 251: ...dividend word CIO G A T C DM R 1st result word CIO G A DM Dr 1st divisor word CIO G A T C DM When the execution condition is OFF DIVL 077 is not executed When the execution condition is ON the 8 digit...

Page 252: ...rounding up the result is required CIO 0200 and 0201 Hold the next values to be added D00103 through D00105 Hold the results of division D00105 is remainder CIO 0010 through CIO 0012 CIO 0012 outputs...

Page 253: ...ss Instruction Operands 00000 LD 000000 00001 BSET 041 000 D00101 D00102 00002 MOV 030 0000 D00000 00003 CMP 020 D00000 0100 00004 AND A50007 00005 INC 090 D00000 00006 MOV 030 D00000 0200 00007 MOV 0...

Page 254: ...When the execution condition is ON ADB 080 adds the content of Au Ad and CY and places the result in R CY will be set if the result is greater than FFFF Au Ad CY CY R Note An equivalent symbol math i...

Page 255: ...n the execution condition is ON SBB 081 subtracts the contents of Su and CY from Mi and places the result in R If the result is negative CY is set and the 2 s com plement of the actual result is place...

Page 256: ...sult and either 0000 or 0001 is placed in CIO 0102 0001 indicates a negative result 079 CLC 081 SBB 0010 D00100 1210 081 SBB 0011 D00101 1211 079 CLC 081 SBB 0000 1210 1210 081 SBB 0000 1211 1211 030...

Page 257: ...0 6 D 3 5A10 10000 60E3 1 0 20F5 10000 B8A3 1 CY 0 from CLC 079 CY 1 0 0 0 0 R 0100 F 9 2 D R 0100 0 6 D 3 R 1 0101 6 8 5 1 R 0101 9 7 A E CY 1 0000 10000 F92D 1 0 0000 10000 6851 1 CY 0 from CLC 079...

Page 258: ...02 X 0 0 1 F F E 0 0 5 19 4 BINARY DIVIDE DVB 083 Variations j DVB 083 083 DVB Dd Dr R Operand Data Areas Ladder Symbol Dd Dividend word CIO G A T C DM DR IR R Result word CIO G A DM Dr Divisor word C...

Page 259: ...d word CIO G A T C DM R 1st result word CIO G A DM Ad 1st addend word CIO G A T C DM When the execution condition is OFF ADBL 084 is not executed When the execution condition is ON ADBL 084 adds the 8...

Page 260: ...iations j SBBL 085 085 SBBL Mi Su R Operand Data Areas Ladder Symbol Mi 1st minuend word CIO G A T C DM R 1st result word CIO G A DM Su 1st subtrahend wordCIO G A T C DM When the execution condition i...

Page 261: ...s complement Address Instruction Operands 00000 LD 000000 00001 CLC 079 00002 SBBL 085 D00100 0200 D00500 97A071CA 0F3B52D8 88651DF2 Mi 1 D00101 Mi D00100 Su 1 CIO 0201 Su CIO 0200 9 7 A 0 7 1 C A 0...

Page 262: ...D00021 0 0 0 9 D00022 0 0 0 0 D00023 5 19 8 DOUBLE BINARY DIVIDE DVBL 087 Variations j DVBL 087 087 DVBL Dd Dr R Operand Data Areas Ladder Symbol Dd 1st dividend word CIO G A T C DM R 1st result word...

Page 263: ...ollowing example the content of CIO 0100 and CIO 0101 is divided by the content of D00500 and D00501 and the results is out put to D00200 through D00203 Address Instruction Operands 00000 LD 000000 00...

Page 264: ...erand Data Areas Ladder Symbol SIGNED BINARY ADD WITH CARRY C 402 Variations j C 402 402 C Au Ad R Ad Addend word CIO G A T C DM DR IR R Result word CIO G A DM DR IR Au Augend word CIO G A T C DM DR I...

Page 265: ...R and R 1 CY will be set if the result is greater than FFFF FFFF Au 1 Ad 1 R 1 CY Au Ad R CY Precautions Refer to page 101 for general precautions on operand data areas Flags ER A50003 Content of DM w...

Page 266: ...word CIO G A T C DM DR IR R Result word CIO G A DM DR IR Au Augend word CIO G A T C DM DR IR Operand Data Areas Ladder Symbol DOUBLE BCD ADD WITHOUT CARRY BL 405 Variations j BL 405 405 BL Au Ad R Ad...

Page 267: ...ontents of Au Ad and CY and places the result in R CY will be set if the result is greater than 9999 CY Au Ad R CY DOUBLE BCD ADD WITH CARRY When the execution condition is OFF BCL 407 is not executed...

Page 268: ...D00110 D00120 00002 LD 000001 00003 BCL 407 D00200 D00210 D00220 5 20 3 Binary Subtraction 410 L 411 C 412 CL 413 SIGNED BINARY SUBTRACT WITHOUT CARRY 410 Variations j 410 410 Mi Su R Operand Data Are...

Page 269: ...ubtracts the 8 digit value in Su and Su 1 from the 8 digit value in Mi and Mi 1 and places the result in R and R 1 If the subtraction resulted in a borrow CY is set Mi 1 Mi Su 1 Su R 1 R CY SIGNED BIN...

Page 270: ...he subtraction result is nega tive the Overflow Flag A50009 turns ON When Mi is a negative number Su is positive and the subtraction result is positive the Underflow Flag A50010 turns ON If a subtract...

Page 271: ...ands 00000 LD 000000 00001 L 411 D00100 D00110 D00120 00002 LD 000001 00003 CL 413 D00200 D00210 D00220 Program Example 2 Example unsigned data 20F55A10 B8A360E3 97AE06D3 In this example the eight dig...

Page 272: ...ON so the result is subtracted from 0000 0000 to obtain the actual result R 1 D00101 Su 1 D00101 Su D00100 0 0 3 D 6 0 E A 7 9 6 5 1 F 9 2 D 1 CY R 1 D00100 Subtraction at 2 0 0 0 0 0 0 8 R 1 D00101 S...

Page 273: ...Symbol Mi Minuend word CIO G A T C DM DR IR R Result word CIO G A DM DR IR Su Subtrahend word CIO G A T C DM DR IR DOUBLE BCD SUBTRACT WITH CARRY BCL 417 Variations j BCL 417 417 BCL Mi Su R Operand...

Page 274: ...is not executed When the execution condition is ON BCL 417 subtracts CY and the 8 digit BCD content of Su and Su 1 from the 8 digit BCD content in Mi and Mi 1 and places the re sult in R and R 1 If t...

Page 275: ...583 960 17 072 641 7 488 681 In this example the eight digit BCD content of CIO 0121 and CIO 0120 is sub tracted from the content of CIO 0201 and CIO 0200 and the result is output in eight digit BCD...

Page 276: ...lag A50004 is ON so the result is subtracted from 0000 0000 Su 1 D00101 Su D00100 0 0 9 2 2 5 1 1 3 1 9 Subtraction at 2 0 0 0 0 0 0 R 1 D00101 0 4 8 8 6 8 1 1 CY R 1 D00100 00000000 100000000 9251131...

Page 277: ...422 U Md Mr R Operand Data Areas Ladder Symbol Md Multiplicand word CIO G A T C DM DR IR R Result word CIO G A DM Mr Multiplier word CIO G A T C DM DR IR DOUBLE UNSIGNED BINARY MULTIPLY UL 423 Variat...

Page 278: ...the execution condition is OFF UL 423 is not executed When the execution condition is ON UL 423 multiplies the unsigned 8 digit content of Md and Md 1 by the unsigned content of Mr and Mr 1 and places...

Page 279: ...425 BCD MULTIPLY B 424 Variations j B 424 424 B Md Mr R Operand Data Areas Ladder Symbol Md Multiplicand word CIO G A T C DM DR IR R Result word CIO G A DM Mr Multiplier word CIO G A T C DM DR IR DOU...

Page 280: ...will not be executed Note Refer to page 101 for general precautions on operand data areas Flags ER A50003 Content of Md Md 1 or Mr Mr 1 is not BCD The content of a DM word is not BCD when set for BCD...

Page 281: ...Dr R Operand Data Areas Ladder Symbol Dd Dividend word CIO G A T C DM DR IR R Result word CIO G A DM Dr Divisor word CIO G A T C DM DR IR DOUBLE UNSIGNED BINARY DIVIDE UL 433 Variations j UL 433 433...

Page 282: ...ion is ON UL 433 divides the 8 digit unsigned content of Dd and D 1 by the unsigned content of Dr and Dr 1 and the result is placed in R to R 3 the quotient in R and R 1 and the remainder in R 2 and R...

Page 283: ...DIVIDE B 434 Variations j B 434 434 B Dd Dr R Operand Data Areas Ladder Symbol Dd Dividend word CIO G A T C DM DR IR R Result word CIO G A DM Dr Divisor word CIO G A T C DM DR IR DOUBLE BCD DIVIDE BL...

Page 284: ...will turn ON and the instruction will not be executed Note Refer to page 101 for general precautions on operand data areas Flags ER A50003 Dd and Dr or Dd Dd 1 Dr and Dr 1 are not BCD The content of a...

Page 285: ...a sign exponent and mantis sa When data is expressed in floating point format the following formula ap plies Real number 1 s 2e 127 1 f s Sign e Exponent f Mantissa The floating point data format conf...

Page 286: ...ill be output as R If the result is positive it will be output as R if negative then R The Equals Flag A50006 will only turn ON when both the exponent e and the mantissa f are zero after a calculation...

Page 287: ...00221 D00101 1 3 4 5 2 282 Address Instruction Operands 00000 LD 000000 00001 BSET 041 0000 D00100 D00101 00002 BIN 100 D00000 D00200 00003 BIN 100 D00001 D00201 00004 FLT 425 D00200 D00202 00005 FLT...

Page 288: ...uare root of x2 y2 The result is then output to D00213 and D00212 as floating point data 4 In order to find the angle Floating point Math Instructions are used to cal culate tan 1 y x ATAN 465 outputs...

Page 289: ...ed When the execu tion condition is ON FIXL 451 converts the 32 bit floating point content of S and S 1 to 32 bit binary data and places the result in R and R 1 S 1 S Floating point data 32 bits Binar...

Page 290: ...50006 The exponent and mantissa of the result are 0 N A50008 The result of the conversion is a negative number 5 21 4 32 BIT TO FLOATING FLTL 453 453 FLTL S R Ladder Symbol Variations FLTL 453 Operand...

Page 291: ...and the result will be output as R If the absolute value of the result is less than the minimum value that can be ex pressed for floating point data the Underflow Flag A50010 will turn ON and the resu...

Page 292: ...ut as R If the absolute value of the result is less than the minimum value that can be ex pressed for floating point data the Underflow Flag A50010 will turn ON and the result will be output as 0 The...

Page 293: ...e output as R If the absolute value of the result is less than the minimum value that can be ex pressed for floating point data the Underflow Flag A50010 will turn ON and the result will be output as...

Page 294: ...the result is less than the minimum value that can be ex pressed for floating point data the Underflow Flag A50010 will turn ON and the result will be output as 0 The various combinations of dividend...

Page 295: ...maximum value that can be expressed for floating point data the Overflow Flag A50009 will turn ON and the result will be output as R If the absolute value of the result is less than the minimum value...

Page 296: ...ta the Overflow Flag A50009 will turn ON and the result will be output as R If the absolute value of the result is less than the minimum value that can be ex pressed for floating point data the Underf...

Page 297: ...rmation on converting from degrees to radian refer to 5 21 9 DEGREES TO RADIANS RAD 458 Relation Between Input Data and Result S Angle radian data R Result sine R Precautions S and S 1must be floating...

Page 298: ...nformation on converting from degrees to radian refer to 5 21 9 DEGREES TO RADIANS RAD 458 Relation Between Input Data and Result S Angle radian data R Result cosine R Precautions S and S 1must be flo...

Page 299: ...rom degrees to radian refer to 5 21 9 DEGREES TO RADIANS RAD 458 If the absolute value of the result is greater than the maximum value that can be expressed for floating point data the Overflow Flag A...

Page 300: ...S and S 1 and places the result in R and R 1 R 1 R S Source floating point data 32 bits S 1 Result floating point data 32 bits SIN 1 The result is output to words R 1 and R as an angle in radians with...

Page 301: ...point data 32 bits COS 1 The result is output to words R 1 and R as an angle in radians within the range of 0 to Relation Between Input Data and Result S Input data cosine R Result radians R Precauti...

Page 302: ...utput to words R 1 and R as an angle in radians within the range of 2 to 2 Relation Between Input Data and Result S Input data tangent R Result radians R Precautions The tangent must be floating point...

Page 303: ...d for floating point data the Overflow Flag A50009 will turn ON and the result will be output as R Relation Between Input Data and Result R S Input data R Result Precautions S and S 1must be non negat...

Page 304: ...l be output as R If the absolute value of the result is less than the minimum value that can be ex pressed for floating point data the Underflow Flag A50010 will turn ON and the result will be output...

Page 305: ...maximum value that can be expressed for floating point data the Overflow Flag A50009 will turn ON and the result will be output as R Relation Between Input Data and Result R S Input data R Result Pre...

Page 306: ...is not BCD Content of DM word is not BCD when set for BCD EQ A50006 The result is 0 Example When CIO 000000 is ON in the following example the content of D00010 is in cremented by 1 as a BCD value Ad...

Page 307: ...ondition is ON INCB 092 increments Wd without affecting carry CY INCB 092 works the same way as INC 090 except that it increments a binary value instead of a BCD value Refer to page 101 for general pr...

Page 308: ...in the following example the content of D00020 is decremented by 1 as a binary value Address Instruction Operands 00000 LD 000002 00001 DECB 093 D00020 2 C 5 A D00020 2 C 5 9 D00020 1 0 5 22 5 DOUBLE...

Page 309: ...l precautions on operand data areas Flags ER A50003 Wd or Wd 1 is not BCD Content of DM word is not BCD when set for BCD EQ A50006 The result is 0 Example When CIO 000000 is ON in the following exampl...

Page 310: ...hen the execution condition is OFF DCBL 097 is not executed When the ex ecution condition is ON DCBL 097 decrements the 8 digit binary number con tained in Wd 1 and Wd without affecting carry CY Wd 1...

Page 311: ...of C is ON outputs the memory address of the word containing the maximum value to IR0 If bit 14 of C is ON and more than one address contains the same maximum val ue the lowest of the addresses will b...

Page 312: ...ariations j MIN 166 a 166 MIN C R1 D R1 1st word in range CIO G A T C DM D Destination word CIO G A DM DR IR C Control word CIO G A DM DR IR Operand Data Areas Ladder Symbol When the execution conditi...

Page 313: ...e not BCD between 001 and 999 Content of DM word is not BCD when set for BCD EQ A50006 The minimum value is zero N A50008 Shows the status of bit 15 of the minimum value Example When CIO 000000 is ON...

Page 314: ...indicating signed binary data 15 14 13 12 11 00 Data type 1 ON Binary 0 OFF BCD Number of words in range N Not used set to zero Data type 1 ON Signed binary 0 OFF Unsigned binary C The 3 rightmost dig...

Page 315: ...T C DM Operand Data Areas Ladder Symbol Variations j ROOT 140 When the execution condition is OFF ROOT 140 is not executed When the execution condition is ON ROOT 140 computes the square root of the 8...

Page 316: ...st be rounded up In this example 6017 77 56 The result is rounded off to an integer according to the digit in the tenths place Thus 77 56 is rounded off to 78 00000 LD 000000 00001 jBSET 041 0000 D001...

Page 317: ...l be treated as 3FFF FFFF for the square root computation Precautions S S 1 must be non negative between 0000 0000 and 3FFF FFFF Note Refer to page 101 for general precautions on operand data areas Fl...

Page 318: ...02 01 00 First word exponent 0 to 7 sign of exponent 0 1 1 0 1 0 0 0 0 1 0 0 0 1 0 0 0 1 mantissa leftmost 3 digits 15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00 Second word mantissa rightmost 4 di...

Page 319: ...D00101 D00100 4 3 4 5 0 0 0 0 D00000 3 4 5 2 D00101 D00100 4 3 4 5 2 0 0 0 D00101 D00100 4 3 4 5 2 0 0 0 D00103 D00102 4 0 0 7 9 0 0 0 D00003 D00002 2 4 3 6 9 6 2 0 0 4369620 x 102 00000 LD 000000 000...

Page 320: ...for general precautions on operand data areas Flags ER A50003 For trigonometric functions S is greater than 0900 or not BCD For linear extrapolation S is not BCD when set for BCD or the table is not r...

Page 321: ...rmines whether the output is BCD or binary OFF specifies BCD and ON specifies binary Bit 15 determines whether the input is BCD or binary OFF specifies BCD and ON specifies binary 15 14 13 Not used 07...

Page 322: ...in any of the fol lowing situations In subroutines between IL 02 and ILC 03 between JMP 04 and JME 05 and in step programming STEP 08 SNXT 09 Do not program PID 270 in these situations Description Whe...

Page 323: ...same number of bits as specified for the input range Proportional band The parameter for P action expressing the proportional control range total control range 0001 to 9999 4 digit BCD 0 1 to 999 9 i...

Page 324: ...nipulated variable output limit control is enabled i e set to 1 set the values as follows 0000 x lower limit x upper limit x output range maximum value PID CONTROL Action Execution Condition OFF All d...

Page 325: ...or reverse operation is shown in the following illustration If the proportional action is used and the present value PV becomes smaller than the proportional band the manipulated variable MV is 100 i...

Page 326: ...hort the correction will be too strong and will cause hunting to occur Integral Action Pi Action and Integral Time Deviation Manipulated variable Step response PI action P action Ti Integral time 0 0...

Page 327: ...bines proportional action P integral action I and derivative action D It produces superior control results even for control objects with dead time It employs proportional action to provide smooth cont...

Page 328: ...rged When overshooting is not a problem but it is desirable to quickly stabilize con trol then narrow the proportional band If the proportional band is narrowed too much however then hunting may occur...

Page 329: ...sed with PID 270 are between 0000 to FFFF hexadecimal Therefore normal operation cannot be achieved if PID 270 is executed for devices that have different data ranges without first converting the data...

Page 330: ...X1 D01504 1770 Y1 Parameters for PID i i D02000 8000 Set value instruction D02001 0260 Proportional band D02002 0290 Integral constant D02003 0040 Derivative constant D02004 0010 Sampling period D0200...

Page 331: ...t C and less than or equal to the upper limit C 1 the input data S will be output to D Upper limit C 1 Output Input Lower limit C Precautions The lower limit C must be less than or equal to the upper...

Page 332: ...are as follows C Lower limit data dead band lower limit C 1 Upper limit data dead band upper limit If the input data S is less than the lower limit C the difference between the input data minus the lo...

Page 333: ...e binary content of CIO 0001 is less than the content of D00100 the result of CIO 0001 minus D00100 will be output to D00110 Address Instruction Operands 00000 LD 000000 00001 BAND 272 0001 D00100 D00...

Page 334: ...n C 1 The content of a DM word is not BCD when set for BCD A50005 The input data S is greater than 0000 EQ A50006 The output data is all zeros A50007 The input data S is less than 0000 N A50008 The ou...

Page 335: ...the result in R Refer to page 101 for general precautions on operand data areas Flags ER A50003 Content of DM word is not BCD when set for BCD EQ A50006 The result is 0 N A50008 Shows the status of bi...

Page 336: ...IO 000000 is ON in the following example the logical OR is taken of cor responding bits in CIO 0010 and CIO 0020 and the results is placed in corre sponding bits of D00200 Address Instruction Operands...

Page 337: ...NOR XNRW 133 Variations j XNRW 133 133 XNRW I1 I2 R I2 Input 2 CIO G A T C DM DR IR R Result word CIO G A DM DR IR I1 Input 1 CIO G A T C DM DR IR Operand Data Areas Ladder Symbol When the execution c...

Page 338: ...n R and R 1 Refer to page 101 for general precautions on operand data areas Flags ER A50003 Content of DM word is not BCD when set for BCD EQ A50006 The result is 0 N A50008 Shows the status of bit 15...

Page 339: ...nding bits in CIO 0010 to CIO 0011 and CIO 0020 to CIO 0020 and the re sults is placed in corresponding bits of D00200 and D00201 Address Instruction Operands 00000 LD 000000 00001 ORWL 135 0010 0020...

Page 340: ...137 Variations j XNRL 137 137 XNRL I1 I2 R I2 Input 2 CIO G A T C DM R Result word CIO G A DM I1 Input 1 CIO G A T C DM Operand Data Areas Ladder Symbol When the execution condition is OFF XNRL 137 is...

Page 341: ...s and turns ON all OFF bits in Wd Refer to page 101 for general precautions on operand data areas Flags ER A50003 Content of DM word is not BCD when set for BCD EQ A50006 The result is 0 N A50008 Show...

Page 342: ...is taken and written back to D02000 and D02001 i e the status of each bit is reversed Address Instruction Operands 00000 LD 000000 00001 COML 139 00002 D02000 0 1 0 1 0 1 0 1 1 0 1 0 1 0 1 0 15 00 15...

Page 343: ...min 07 s 10 135 927 s 00000 LD NOT 000000 00001 SEC 143 D00100 D00200 143 SEC D00100 D00200 Address Instruction Operands 0000 00 5 26 2 SECONDS TO HOURS HMS 144 144 HMS S R R 1st result word CIO G A...

Page 344: ...2 CADD 145 and the Calendar Clock Area G001 to G004 corrects for leap year The following table shows the format of calendar information The format is the same for the results output to R R 1 and R 2...

Page 345: ...OFF CSUB 146 is not executed When the ex ecution condition is ON CSUB 146 subtracts the time in words T and T 1 from the calendar data in words C C 1 and C 2 and outputs the result to words R R 1 and...

Page 346: ...through D01002 and output as calender data to D00500 through D00502 Address Instruction Operands 00000 LD 000000 00001 CSUB 146 D00100 D00200 D00500 90 04 12 18 40 30 1532 27 19 90 02 07 22 13 11 C 2...

Page 347: ...000000 is ON in the following example the internal clock setting will be changed according to the content of D00100 through D00103 Address Instruction Operands 00000 LD 000000 00001 DATE 179 D00100 2...

Page 348: ...on the front of the CPU will light but PC operation will continue When FALS 007 is executed with an ON execution condition the FALS Instruction Flag A40106 will be turned ON the ERROR indicator will...

Page 349: ...ecution will continue When CIO 000001 turns ON the FAL 001 error is cleared A43001 turns OFF the error code in A400 is cleared if it is 4101 and the ALARM indicator turns off assuming no other errors...

Page 350: ...ndition is OFF FPD 177 is not executed When the exe cution condition is ON FPD 177 monitors the time until the diagnostic output is executed with an ON execution condition If this time exceeds T the f...

Page 351: ...ut There are two ways to output the bit address of the OFF condition detected in the logic diagnosis operation 1 2 3 1 Bit address output used when bit 15 of C is OFF Bit 15 of D indicates whether or...

Page 352: ...itions when specifying a word operand for T This operation cannot be used if a constant is set for T 1 2 3 1 Connect a Programming Device such as a Programming Console 2 Use the Programming Device to...

Page 353: ...010 OR NOT 000004 00011 AND LD 00012 OUT 002000 The contents of D00100 through D00108 would be as follows for the conditions described above This data would be displayed on the Programming Device as 0...

Page 354: ...pecify T in BCD between 0000 and 3999 i e 0 to 39 990 ms WDT 178 can be programmed and executed as many times as desired and each will extend the maximum cycle time by the specified amount until the v...

Page 355: ...nstruction Example When CIO 000000 is ON in the following example the status of all inputs allo cated to bits in words from CIO 0010 through CIO 0014 will be read into memory refreshing the status of...

Page 356: ...bit 07 is set for 7 segment display code segments a to f of the leftmost digit are contained in S bits 00 to 06 segments a to f of the second digit are contained in S bits 08 to 14 Set bits 07 and 15...

Page 357: ...Ladder Symbol Variations j EMBC 171 When the execution condition is OFF EMBC 171 is not executed When the execution condition is ON EMBC 171 changes the current EM bank to the one indicated by the EM...

Page 358: ...dex register IR0 If more than one address contains the comparison data the EQ Flag A50006 is turned ON and only the lowest address containing the comparison data is writ ten to IR0 If none of the addr...

Page 359: ...metic Flags to the status recorded by the last CCS 173 instruction The following table shows the Arithmetic Flags affected by CCL 172 Bit Arithmetic Flag A50003 Instruction Execution Error Flag A50004...

Page 360: ...OAD REGISTER REGL 175 175 REGL S S 1st source word CIO G A DM Operand Data Area Ladder Symbol Variations j REGL 175 When the execution condition is OFF REGL 175 is not executed When the ex ecution con...

Page 361: ...005 Address Instruction Operands 00000 LD 000000 00001 REGS 176 D10000 3 5 2 A 3 5 2 A C 7 3 9 1 D A 2 E 5 2 A 5 1 B 0 0 E 7 3 C 7 3 9 1 D A 2 E 5 2 A 0 E 7 3 5 1 B 0 D10000 D10001 D10002 D10004 D1000...

Page 362: ...09 is used to start step execution step execution will continue until STEP 008 is executed without a control bit STEP 008 executed without a control bit is used to stop step execution and return to no...

Page 363: ...ntial and from the same word STEP 008 and SNXT 009 cannot be used inside of subroutines or block pro grams Only one step programming area can be executed during any one cycle Interlocks jumps SBN 150...

Page 364: ...he three types of execution control possible with step programming Example 1 demonstrates sequential execu tion Example 2 branching execution and Example 3 parallel execution The following process req...

Page 365: ...012800 009 SNXT 012801 008 STEP 012801 009 SNXT 012802 008 STEP 012802 009 SNXT 012803 008 STEP 012803 0000 01 0000 02 0000 03 0000 04 Programming for process A Programming for process B Programming f...

Page 366: ...processes are to start and end SW A1 SW A2 SW B1 SW B2 Process C Weight scale Process B Process A Printer SW D The following diagram demonstrates the flow of processing and the switches that are used...

Page 367: ...process B Programming for process C 00000 jLD 000001 00001 AND NOT 000002 00002 SNXT 009 010000 00003 LD NOT 000001 00004 jAND 000002 00005 SNXT 009 010001 00006 STEP 008 010000 Process A 00100 LD 00...

Page 368: ...starts Process A Process E End Process C SW7 Process B Process D SW3 SW4 SW 1 and SW2 both ON SW5 and SW6 both ON The program for this operation shown below starts with two SNXT 009 instruc tions that...

Page 369: ...T 050004 0000 03 009 SNXT 050003 008 STEP 050003 Programming for process C 0000 04 SW5 SW6 SW4 008 STEP 050004 Programming for process D SW3 SW1 SW2 009 SNXT 024613 Programming for process E 008 STEP...

Page 370: ...T 152 All subroutines must be programmed at the end of the main program When one or more subroutines have been programmed the main program will be ex ecuted up to the first SBN 150 before returning to...

Page 371: ...h an ON ex ecution the instructions between the SBN 150 with the same subroutine num ber and the first RET 152 after it are executed before execution returns to the instruction following the SBS 151 t...

Page 372: ...001 Main program Subroutines A B C D E A A A A B B B B C C C C D D E E OFF execution conditions for subroutines 000 and 001 ON execution condition for subroutine 000 only ON execution condition for su...

Page 373: ...ugh A207 are then transferred back to D through D 3 before MCRO 156 is completed Subroutines called by MCRO 156 are defined by SBN 150 and RET 152 just like normal subroutines For details concerning t...

Page 374: ...56 can be used to simplify a pro gram The second program section uses MCRO 156 whereas the first one does not Address Instruction Operand 00000 LD 000000 00001 OR 010000 00002 AND 010001 00003 OUT 010...

Page 375: ...e other stack instructions can be used 5 31 1 SET STACK SSET 160 160 SSET TB1 N N Number of words CIO G A T C DM DR IR TB1 1st stack address CIO G A DM Operand Data Areas Ladder Symbol Variations j SS...

Page 376: ...G A T C DM DR IR TB1 1st stack address CIO G A DM Operand Data Areas Ladder Symbol Variations j PUSH 161 When the execution condition is OFF PUSH 161 is not executed When the ex ecution condition is O...

Page 377: ...ions j LIFO 162 When the execution condition is OFF LIFO 162 is not executed When the ex ecution condition is ON LIFO 162 decrements the memory address in the stack pointer TB1 1 by one and then copie...

Page 378: ...em ented by one TB1 must be the first address of a stack defined using SSET 160 Do not allow the stack pointer to be decremented to the memory address of the stack pointer If the content of the stack...

Page 379: ...ied data will be traced at a regular interval independent of the cycle time refer to Data Tracing in the SYSMAC Support Software Opera tion Manual The timer interval can be set to between 5 and 2550 m...

Page 380: ...mple that falls before the start marker is overwritten this is especially true if the delay is positive The negative delay cannot be such that the required data was executed before sam pling was start...

Page 381: ...e Execution Time Measured Flag A00808 turns ON when the specified execution time has been measured Re fer to the SSS Operation Manuals for details The word addresses trigger conditions and delay must...

Page 382: ...03 or CY Flag A50004 is turned ON the instruction will not be executed If the data cannot be sent or the Special I O Unit is busy the data will be trans ferred during the next cycle To make sure that...

Page 383: ...O Unit Word operands have been designated for a Special I O Unit that requires a constant The Slave is not set to 54MH The communications path is not normal EQ A50006 OFF while data is being read ON w...

Page 384: ...to be read plus the number of words to be read is more than 100 binary the Error Flag A5003 will turn ON If an error occurs at the Special I O Unit such as for example a non readable area being specif...

Page 385: ...sferred in order to D00300 through D00311 Address Instruction Operands 00000 LD 000000 00001 OR 001000 00002 RD2 280 020C 0004 D00300 00003 AND NOT A50006 00004 OUT 001000 0 2 Number of words to be re...

Page 386: ...l not be executed and the Carry Flag A50004 will turn ON Be sure to control execution of these instructions so that no more than two are being executed simultaneously for Units connected under the sam...

Page 387: ...OFF while data is being written ON when writing has been completed Example 1 When CIO 000001 is ON in the following example the number of words speci fied in CIO 0001 is read consecutive from words s...

Page 388: ...0100 00003 LD 000000 00004 jINC 090 D00000 00005 jMOV 030 0002 D00000 00006 LD C0010 00007 OR 020000 00008 AND NOT 020001 00009 OUT 020000 00010 WRIT 191 0100 D00001 0003 00011 AND A50006 00012 OUT 02...

Page 389: ...D2 28 must remain ON WR2 281 carries out data exchange with the Special I O Unit via the I O area so the time required to complete execution depends on the I O refresh interval i e the cycle time Be s...

Page 390: ...gramming De vices 5 34 1 DISABLE ACCESS IOSP 187 187 IOSP Variations j IOSP 187 Ladder Symbol When the execution condition is OFF IOSP 187 is not executed When the ex ecution condition is ON both read...

Page 391: ...om other specified Units Address Instruction Operands 00000 LD 000000 00001 IOSP 187 5 34 2 ENABLE ACCESS IORS 188 188 IORS Ladder Symbol When the execution condition is OFF IORS 188 is not executed W...

Page 392: ...bits A09900 to A09907 correspond to messages 0 to 7 A message instruction can be cleared by executing the instruction with a con stant 0000 to FFFF entered for M Precautions N must be BCD between 0000...

Page 393: ...ink Unit corresponds to the unit number for the host link interface in the PC Setup 2 The execution condition for the up differentiated variation jSEND 192 might not be recognized when the mode has be...

Page 394: ...i e 0 to F Bits 04 to 07 Set to 0 Bits 08 to 11 Transmission port number 0 to 7 Bit 12 to 14 Set to 0 Bit 15 ON No response OFF Response returned C 4 Response monitoring time 0001 to FFFF 0 1 to 6553...

Page 395: ...sfers data beginning at word S from the designated PC BASIC Unit Personal Computer Unit or host computer in the designated node on the SYSMAC NET Link SYSMAC LINK Controller Link System to addresses b...

Page 396: ...nit numbers 0 to F SYSMAC BUS 2 Group 2 Slave 90 to CF Unit number 90 10 Master address 4 Values of 01 to 7E indicate nodes 1 to 126 Set to 00 to receive data from within the local PC 5 Designates the...

Page 397: ...ing from a PC through a SYSMAC NET Link System When CIO 000000 is ON the RECV 193 transfers the content of CIO 0101 through CIO 0105 of the PC on node 3 of network 1 to D05001 through D05005 of the PC...

Page 398: ...plex mode to simplex mode Control Data The control words beginning with C specify the number of bytes of control data to be sent the number of bytes of response data to be received the destination nod...

Page 399: ...ied below To be able use of CMND 194 the PC must have a SYSMAC NET Link SYSMAC LINK Unit Con troller Link Unit or SYSMAC BUS 2 Remote I O Master Unit mounted Do not change the control data during a tr...

Page 400: ...YSMAC LINK System Manual or Controller Link System Manual for details about com mand response operations If more than one network instruction SEND 192 RECV 193 CMND 194 is used through one port the fo...

Page 401: ...isn t necessary to take steps to synchronize data processing as in the CVM1 and CV series PCs To ensure successful SEND 192 RECV 193 operations with more than one in struction for a single port your...

Page 402: ...2 prevents execution of RECV 193 when SEND 192 above has not completed CIO 000001 is turned ON to start transmission if the Port 4 Enable Flag is also ON CIO 012802 remains ON until RECV 193 has compl...

Page 403: ...AND A50204 00018 OUT 000200 00019 jLD 000001 00020 AND A50204 00021 AND NOT 012800 00022 LD 012803 00023 KEEP 011 012802 00024 LD 012802 00025 jMOV 030 000A D00010 00026 jMOV 030 000A D00000 00027 jM...

Page 404: ...e receiving PC the code in the last word of the trans mitted data is used to prevent more data from being transferred until the trans mitted data is copied to another section of Data Memory for storag...

Page 405: ...ONDITIONAL BLOCK EXIT NOT EXIT 006 NOT Conditionally ends block program execution LOOP LOOP 009 Starts a loop LOOP END NOT LEND 010 NOT Ends a loop BLOCK PROGRAM PAUSE BPPS 011 Temporarily stops block...

Page 406: ...22 CNTR 012 Step i i STEP 008 p instructions SNXT 009 Shift instructions SFT 050 Subroutine i i SBN 150 instructions RET 152 Diagnostic instructions FPD 177 PID and related instructions PID 270 Specia...

Page 407: ...a bit operand or IF 002 NOT with a bit operand If the IF condition is YES the instructions immediately following the IF 002 or IF 002 NOT will be executed A YES execution condition is produced by an...

Page 408: ...e next ELSE 003 and or IEND 004 IF 002 IF 002 IF 002 IEND IEND IEND Flags No flags are affected by these instructions Example The following example shows two different block programs controlled by CIO...

Page 409: ...ced in D00010 and then 0001 is moved into D00011 based on the status of CY If either CIO 000003 or CIO 000004 is OFF then the entire addition operation is skipped and CIO 000301 is turned ON Address I...

Page 410: ...ock program will be executed Once the entire block program has been executed the process is repeated WAIT 005 NOT cannot be used without an operand bit If programs are edited online from a Programming...

Page 411: ...you to skip the portion of block pro gram from EXIT 006 to BEND 001 while B is ON or if a bit is not speci fied while the execution condition is ON As long of the execution condition or operand bit of...

Page 412: ...becomes YES LOOP 009 desig nates the beginning of the loop program and a LEND 010 or LEND 010 NOT instruction specifies the end of the loop When LEND 010 or LEND 010 NOT is reached program execution w...

Page 413: ...OOP 009 B 00024 IORF 184 0000 0000 00025 LEND 010 000001 C 00033 BEND 001 5 35 7 BLOCK PROGRAM PAUSE RESTART BPPS 011 BPRS 012 N Block program number 00 to 99 Operand Data Area Ladder Symbol BPPS 011...

Page 414: ...o create a specified time lag SV between execution of the program part preceding it and the part following The first part will be executed the first time the block program is entered When the block ti...

Page 415: ...T CNTW 014 SV Set value CIO G A T C DM DR IR I Count input CIO G A T C N Counter number C Operand Data Areas Ladder Symbol CNTW 014 N SV I CNTW 014 allows you to create a count lag SV between executio...

Page 416: ...D 001 0005 7000 000100 Address Instruction Operands 000000 LD 000000 000001 BPRG 250 00 A 000200 CNTW 014 0005 7000 000100 B 000300 BEND 001 250 BPRG 00 0000 00 Flags ER A50003 SV data is not BCD Indi...

Page 417: ...fter Power Interruptions 416 6 1 6 I O Refreshing in SYSMAC BUS 2 and SYSMAC BUS Systems 417 6 1 7 Power OFF Operation 417 6 2 Cycle Time 418 6 2 1 Synchronous Operation 419 6 2 2 Duplex Initializatio...

Page 418: ...tain I O memory Self diagnosis S Hardware check S Memory check Verify duplex status Verify active CPU status Automatic program transfer at start up Clear I O memory End initialization Active ACT CPU U...

Page 419: ...Memory check S Battery check S Clock processing S Start input check S Duplex bus check Common pre processing Duplex Synchronizing Waiting CPU Bus Unit servicing Programming Device servi cing Host Lin...

Page 420: ...d write operations cannot be performed from the program and the Memory Card instructions FILR 180 FILW 181 FILP 182 and FLSP 183 cannot be used in the CVM1D These instructions will be processed as NOP...

Page 421: ...terruption signal Program execution Momentary Power Interruption Flag A40202 CPU reset signal RUN output 85 Power interruption detection time 10 to 25 ms for AC power 0 3 to 1 ms for DC power Normal I...

Page 422: ...to 59 08 to 15 Minutes 00 to 59 A013 00 to 07 Hours 00 to 23 24 hour system 08 to 15 Day of month 01 to 31 adjusted by month and for leap year A014 00 to 15 Number of power interruptions 0 to 9 999 6...

Page 423: ...re updated according to status of input signals Output signals sent to Units connected to Slaves are updated according to status of output bits in memory 1 ms per Master plus 0 05 ms per word on Remot...

Page 424: ...wing table shows the execution timing and processing that occur during duplex initialization UM is the Program Area and IOM is I O memory Execution Timing Processing g UM Verification UM Transfer PC S...

Page 425: ...the cases in which operation will be switched from du plex to simplex operation CPU Status Cause for Switching Precautions during Switching Active CPU Standby CPU Standby CPU Active CPU The active an...

Page 426: ...1 ON when a memory error is generated at the other CPU Unit 2 Use G00008 and A39115 G00008 A39115 Error output G00008 SPL DPL mode setting output OFF in simplex mode ON in duplex mode A39115 ON during...

Page 427: ...ace operations are writing events Data area block write data area transfer parameter area write parameter area block write start program area protect clear protect area program area write program area...

Page 428: ...Refer to the next section for instruction execution times Using the cycle time in calculating the I O response time is described in the last part of Section 6 16 point Input Units 32 point Input Unit...

Page 429: ...ends not only on the instruction but also on the operands used for the instruction If an index register is addressed directly or a data register is used as an operand the instruction will require one...

Page 430: ...R or IL 10 7 SET 016 2 0 375 0 38 RSET 017 2 UP 018 2 4 0 4 0 DOWN 019 2 CMP 020 4 When comparing a constant to a word 3 3 0 88 When comparing two DM 5 9 CMP 020 4 Additional time over CMP 020 for eac...

Page 431: ...ch output word being used 4 0 Additional time over MOV 020 for words other than I O words 0 MVN 031 4 When transferring a constant to a word 4 4 When transferring DM to DM 5 4 MOVL 032 4 When transfer...

Page 432: ...ing 1 bit in a word 15 8 DM DM 15 bits shift 32 4 NSFR 055 5 Shifting 1 bit in a word 15 6 DM DM 15 bits shift 32 4 NASL 056 4 1 bit word shift 14 1 1 0 DM 16 bits shift 19 4 NASR 057 4 1 bit word shi...

Page 433: ...ord word 17 5 DM DM DM 21 0 MULL 076 5 Constant x word word 53 8 DM x DM word 57 3 DIVL 077 5 Word constant word 62 1 DM DM DM 65 5 STC 078 2 1 38 0 75 CLC 079 2 1 38 ADB 080 5 Constant word word 6 0...

Page 434: ...expanding a word to a word 5 5 When expanding DM to DM 7 5 MLPX 110 5 When decoding a word to a word 6 0 1 13 When decoding DM to DM 13 0 DMPX111 5 When encoding a word to a word 8 1 When encoding DM...

Page 435: ...sine 338 When specifying a word with 256 word table 2 35 ms SEC 143 4 When converting a word to a word 342 1 0 When converting DM to DM 477 HMS 144 4 740 CADD 145 5 0 94 ms 1 13 CSUB 146 5 0 94 ms SBN...

Page 436: ...on 259 DM designation 262 IORF 184 4 When refreshing 1 word Simplex 23 6 Duplex 925 1 0 When refreshing 32 words Simplex 312 Duplex 1 386 IOSP 187 2 228 0 75 IORS 188 2 2 0 IL 0 75 IODP 189 4 308 1 0...

Page 437: ...00 DM DM 39 0 BINS 275 5 Word word 13 4 1 13 DM DM 20 9 BCDS 276 5 Word word 13 5 DM DM 20 3 BISL 277 5 Word word 17 8 DM DM 25 4 BDSL 278 5 Word word 19 4 DM DM 26 1 RD2 280 5 Reading 1 word to word...

Page 438: ...omparing DM and DM 17 5 S 322 5 Comparing constant and word 12 5 Comparing DM and DM 17 0 SL 323 5 Comparing constant and word 13 3 Comparing DM and DM 17 8 325 5 Comparing constant and word 12 3 Comp...

Page 439: ...5 DM DM DM 21 0 420 5 Constant x word word 20 8 DM x DM DM 28 6 L 421 5 Constant x word word 46 1 DM x DM DM 55 5 U 422 5 Constant x word word 13 5 DM x DM DM 17 4 UL 423 5 Constant x word word 39 0 D...

Page 440: ...word 3 76 ms ACOS 464 5 Word word 3 85 ms ATAN 465 5 Word word 1 82 ms SQRT 466 5 Word word 742 EXP 467 5 Word word 3 72 ms LOG 468 5 Word word 1 87 ms BEND 001 2 3 88 2 38 IF 002 3 Without operand 3...

Page 441: ...e the minimum and maximum cycle times shown calculated below Input ON delay 1 5 ms Output ON delay 15 ms Cycle time 20 ms The PC responds most quickly when it receives an input signal just prior to th...

Page 442: ...PC controlling a SYSMAC BUS System Both the input and output are on I O Units connected to Slave Racks SYSMAC BUS refreshing is carried out just after I O refreshing as one phase of the PC cycle The...

Page 443: ...Input signal Output signal Cycle Cycle time I O refresh I O response time Output ON delay Input ON delay Buffer in Master Transmission time TRM A B A B A B A B A Program execution B Programming Devic...

Page 444: ...y communications cycle time 5 cycle time x 2 output ON delay Minimum I O response time 1 5 5 5 20 2 15 81 5 ms The PC takes longest to respond when it receives the input signal just after SYS MAC BUS...

Page 445: ...d provide the default values The PC Setup can be changed from the SSS Refer to SSS Operation Manuals for details changing settings The use of each parameter in the PC Setup is described where relevant...

Page 446: ...s T CPU standby Specifies whether the CPU is to go on standby or start operation while initializing the system or detecting terminators in SYSMAC BUS 2 Systems K Measure CPU SIOU cycle Specifies wheth...

Page 447: ...r Do not specify any bits allocated to I O points on Remote I O Units Outputs on Remote I O Units will remain on after program execution stops if they are in the hold area Default CIO 1200 to CIO 1499...

Page 448: ...n CPU bus Unit services is to be measured If measured the cycle is stored starting at A310 Changes to this setting are effective immediately Default Don t measure cycle G Execute control 2 Execute pro...

Page 449: ...hanging this setting Default See the table on page 7 3 for details M Trans I O addr Designate the first word between CIO 0000 and CIO 2555 for each Master for SYSMAC BUS I O Terminals Do not designate...

Page 450: ...Mode 1 7 3 PC Setup Default Settings Parameter Default value A Hold areas H Hold areas CIO 1200 to CIO 1499 R Hold bits Nothing held B Startup hold K Forced Status Reset at startup I I O bits Reset a...

Page 451: ...ks Group 3 SYSMAC BUS 2 RM0 RM1 RM2 RM3 CIO 0300 CIO 0500 CIO 0700 CIO 0900 Words allocated to Units in order under each Master RT SYSMAC BUS Defaults for SYSMAC BUS Slaves are the same as for I O Ter...

Page 452: ...g 9 subtracting from clock time 340 clock pulse bits 58 commands delivering commands through a network 392 compatible devices 7 complements calculating 336 CompoBus D memory areas 38 conditions defini...

Page 453: ...ad zone control 328 DEBUG mode description 6 decimal points 29 decrementing 301 305 definers definition 100 differentiated instructions 103 function codes 100 digit numbers 28 DIP switch 13 display I...

Page 454: ...tion Time Measured Flag 47 376 FAL Flag 56 FALS Flag 53 First Cycle Flag 58 GR 57 I O Bus Error Flag 53 I O Setting Error Flag 53 I O Verification Error Flag 56 I O Verification Error Wait Flag 50 Ind...

Page 455: ...gnal definition 3 instruction lines definition 67 instruction sets F 454 286 F 455 287 F 456 288 F 457 289 ACOS 464 296 ADB 080 249 ADBL 084 254 ADD 070 238 ADDL 074 243 AND 70 107 combining with OR 7...

Page 456: ...MARK 174 376 MAX 165 306 MCMP 024 199 MCRO 156 368 MIN 166 307 MLB 082 252 MLBL 086 256 MLPX 110 214 MOV 030 175 MOVB 042 187 MOVD 043 189 MOVL 032 177 MOVQ 037 182 MOVR 036 181 MSG 195 386 MTIM 122...

Page 457: ...122 converting to mnemonic code 121 using self maintaining bits 86 intermediate instructions 67 87 Interrupt Input Units 416 IR See Index Registers J L jump numbers 123 jumps 122 125 CJP 221 and CJPN...

Page 458: ...PC definition 5 output bits application 32 controlling ON OFF time 112 controlling status 85 86 definition 3 output device definition 3 output point definition 3 output signal definition 3 OV See flag...

Page 459: ...15 419 SYSMAC BUS Remote I O System disabling read write access 385 disabling refreshing 48 420 enabling read write access 386 Error Flags and Check Bits 54 I O allocation 38 I O refreshing 417 I O re...

Page 460: ...configuration 35 CPU Bus Units definition 4 definition 3 determining requirements 5 I O Control Units See display I O Interface Units See display I O Units definition 3 Interrupt Input Units 416 Link...

Page 461: ...the changes made to the manual during each revision Page numbers refer to the previous version Revision code Date Revised content 1 January 1999 Original production 2 August 2001 Page xiv Wording of i...

Page 462: ...SYSMAC CVM1D Duplex System Programmable Controllers Operation Manual Revised August 2001...

Page 463: ...iv...

Page 464: ...ns word and is abbreviated Wd in documentation in this sense The abbreviation PC means Programmable Controller and is not used as an abbreviation for any thing else Visual Aids The following headings...

Page 465: ...vi...

Page 466: ...tch Settings 14 2 3 EM Units 17 2 4 Memory Cards 18 2 5 Setting Rack Numbers 22 2 6 I O Control Unit and I O Interface Unit Displays 22 SECTION 3 Memory Areas 25 3 1 Introduction 27 3 2 Data Area Stru...

Page 467: ...s 237 5 19 Binary Calculation Instructions 249 5 20 Symbol Math Instructions 259 5 21 Floating point Math Instructions 280 5 22 Increment Decrement Instructions 301 5 23 Special Math Instructions 306...

Page 468: ...ramming and software operation These include switches on the CPU Unit and basic PC configuration This in formation is covered in more detail in the CVM1D Installation Guide Section 3 describes the way...

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