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4-4-2 Coding Multiple Right-hand Instructions
If there is more than one right-hand instruction executed with the same execu-
tion condition, they are coded consecutively following the last condition on the
instruction line. In the following example, the last instruction line contains one
more condition that corresponds to an AND with CIO 000400.
Address
Instruction
00000
LD
000000
00001
OR
000001
00002
OR
000002
00003
OR
000200
00004
AND
000003
00005
OUT
000001
00006
OUT
000500
00007
AND
000400
00008
OUT
000506
Operands
0000
01
0005
00
0005
06
0000
00
0000
03
0004
00
0000
01
0000
02
0002
00
4-5
Branching Instruction Lines
When an instruction line branches into two or more lines, it is sometimes neces-
sary to use either interlocks or TR bits to maintain the execution condition that
existed at a branching point. This is because instruction lines are executed
across to a right-hand instruction before returning to the branching point to
execute instructions one a branch line. If a condition exists on any of the instruc-
tion lines after the branching point, the execution condition could change during
this time making proper execution impossible. The following diagrams illustrate
this. In both diagrams, instruction 1 is executed before returning to the branching
point and moving on to the branch line leading to instruction 2.
Instruction 2
00000
LD
000000
00001
AND
000001
00002
Instruction 1
00003
AND
000002
00004
Instruction 2
00000
LD
000000
00001
Instruction 1
00002
AND
000002
00003
Instruction 2
Branching
point
Diagram B: Incorrect Operation
Diagram A: Correct Operation
Address
Instruction
Address
Instruction
Operands
Operands
0000
00
0000
02
Instruction 1
0000
00
0000
02
Instruction 2
Instruction 1
Branching
point
0000
01
If, as shown in diagram A, the execution condition that existed at the branching
point cannot be changed before returning to the branch line (instructions at the
far right do not change the execution condition), then the branch line will be
executed correctly and no special programming measure is required.
If, as shown in diagram B, a condition exists between the branching point and the
last instruction on the top instruction line, the execution condition at the branch-
ing point and the execution condition after completing the top instruction line will
sometimes be different, making it impossible to ensure correct execution of the
branch line.
There are two means of programming branching programs to preserve the
execution condition. One is to use TR bits; the other, to use interlocks
(IL(002)/ILC(003)).
Branching Instruction Lines
Section 4-5
Summary of Contents for CVM1D
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