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It is also possible to access any memory location through its hexadecimal inter-
nal I/O memory address with indirect addressing. Refer to 3-9 DM and EM
Areas, and 3-10 IR and DR Areas, for details on indirect addressing.
Word Structure
Memory areas are divided up into words, each of which consists of 16 bits num-
bered 00 through 15 from right (least significant) to left (most significant). CIO
words 0000 and 0001 are shown below with bit numbers. Here, the content of
each word is shown as all zeros. Bit 00 is called the rightmost bit; bit 15, the left-
most bit.
The term least significant bit is often used for rightmost bit; the term most signifi-
cant bit, for leftmost bit.
Bit number
CIO word 0000
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
CIO word 0001
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
15
14
13
12
11
10
09
08
07
06
05
04
03
02
01
00
Data in the DM Area and EM Area, as well as Timer and Counter PVs can be
accessed as words only. Transition Flags, Step Flags, and Timer and Counter
Completion Flags can be accessed as bits only. You cannot designate any of
these for operands requiring bit data. Data in the CIO, CPU Bus Link, and Auxil-
iary Areas is accessible either by word or by bit, depending on the instruction in
which the data is being used.
To designate one of these areas by word, all that is necessary is the acronym, if
required, and the two-, three-, or four-digit word address. To designate an area
by bit, the word address is combined with the bit number as a single four- to six-
digit address. The following table shows examples of this. The two rightmost dig-
its of a bit address must indicate a bit between 00 and 15, e.g., the rightmost digit
must be 5 or less when the next digit to the left is 1.
The same timer and counter numbers can be used to designate either the pres-
ent value (PV) of the timer or counter, or the Completion Flag for the timer or
counter. This is explained in more detail in 3-7 Timer Area and 3-8 Counter Area.
Area
Word designation
Bit designation
CIO
0000
000015 (leftmost bit in word CIO 0000)
CIO
0252
025200 (rightmost bit in word CIO 0252)
DM
D01250
Not possible
T
T215 (designates PV)
T215 (designates Completion Flag)
A
A012
A01200
To designate a word by its internal I/O memory address, write the hexadecimal
address to an Index Register, DM, or EM word and indirectly address the oper-
and through that register or word. Refer to 3-9 DM and EM Areas and 3-10 IR
and DR Areas for details on indirect addressing.
Word data input as decimal values is stored in binary-coded decimal (BCD);
word data entered as hexadecimal is stored in binary form. Each four bits of a
word represent one digit, either a hexadecimal or decimal digit, numerically
equivalent to the value of the binary bits. One word of data thus contains four
digits, which are numbered from right to left. These digit numbers and the corre-
sponding bit numbers for one word are shown below.
Bit number
Contents
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
15
14
13
12
11
10
09
08
07
06
05
04
03
02
01
00
Digit number
3
2
1
0
Data Structure
Data Area Structure
Section 3-2
Summary of Contents for CVM1D
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