Omron CVM1D, Operation Manual

Page: 133 / 468

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Indirect Addressing 10.Timer and counter numbers for TIM, TIMH(015), TTIM(120), CNT,
CNTR(012), TIMW<013>, CNTW<014>, and TMHW<015> can be indirectly
addressed using the Index Registers by moving the PC memory address of the
PV of the timer or counter number to the Index Register. PVs for timers T0000
through T1023 are contained in PC memory addresses $1000 through $13FF,
and PVs for counters C0000 through C1023 are contained in PC memory ad-
dresses $1800 through $1BFF. MOVR(036) can be used to move memory ad-
dresses for Completion Flags to Index Registers.
Caution If the Index Register doesn’t contain a valid address for a timer or counter PV, the
instruction will not be executed, and the ER (A50003) Flag will not be turned ON.
The following example shows a program section that uses indirect addressing to
define and start 100 timers with SVs contained in D00100 through D00199. IR0
contains the PC memory address of the timer PV and IR1 contains the PC
memory address of the timer Completion Flag.
DM address Content Function
D00100 0010 SV for T0000
D00101 0100 SV for T0001
D00102 0050 SV for T0002
. . .
. . .
. . .
D00199 0999 SV for T0099
00000 LD A50013
00001 MOV(030)
#1000
IR0
00002 MOVR(036)
T0000
IR1
00003 MOVR(036)
200000
IR2
00004 MOV(030) #0100
D00000
00005 JME(005) #0001
00006 LD NOT ,IR2+
00007 TIM ,IR0+
*
D00000
00008 LD ,IR1+
00009 OUT ,IR2+
00010 LD A50013
00011 INC(090)
D00000
00012 CMP(020)
#0200
D00000
00013 LD A50006
00014 JMP(004) #0001
Address Instruction Operands
A500
13
A500
13
A500
06
(030)
MOV
#1000 IR0
(036)
MOVR
T0000 IR1
(030)
MOV
#0100 D00000
(005)
JME
#0001
(030)
TIM
,IR0+ *D00000
(090)
INC
D00000
(020)
CMP
#0200 D00000
(004)
JMP
#0001
,IR2+
(036)
MOVR 200000
IR2
,IR2+
, IR1+
Caution Do not use jump number 0000 in the above type of programming.
Timer and Counter Instructions
Section 5-13