162
5-14-12 ARITHMETIC SHIFT RIGHT: ASR(061)
(061)
ASR
Wd
Wd: Word
CIO, G, A, DM, DR, IR
Operand Data Area
Ladder Symbol
Variations
j
ASR(061)
When the execution condition is OFF, ASR(061) is not executed. When the ex-
ecution condition is ON, ASR(061) shifts a 0 into bit 15 of Wd, shifts the bits of Wd
one bit to the right, and shifts the status of bit 00 into CY.
1 0 0 1 0 1 1 0 0 1 1 0 0 1 0
1
Bit
00
Bit
15
CY
0
Flags
ER (A50003):
Content of
*
DM word is not BCD when set for BCD.
CY (A50004):
Receives the status of bit 00.
EQ (A50006):
Content of Wd is 0 after a shift.
N (A50008):
OFF.
Example
When CIO 000000 is ON in the following example, 0 is shifted into bit 15 of
D00010, the status of all bits within D00010 are shifted right one position, and
the status of bit 00 is shifted to CY.
Address
Instruction
Operands
00000
LD
000000
00001
ASR(061)
D00010
LSB
MSB
0
CY
LSB
MSB
0
CY
0 1 1 0 0 1 0 1 1 0 0 1 1 0 0 1
1 1 0 0 1 0 1 1 0 0 1 1 0 0 1 0
Wd: D00010
Description
Shift Instructions
Section 5-14
0000
00
(061)
ASR D00010
Summary of Contents for CVM1D
Page 462: ...SYSMAC CVM1D Duplex System Programmable Controllers Operation Manual Revised August 2001...
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