Chapter 6
RTSI Trigger
©
National Instruments Corporation
6-3
DAQ-STC Technical Reference Manual
Use the following function to program the RTSI interface.
Function
MSC_RTSI_Pin_Configure
{
switch (pin class)
{
case RTSI Trigger:
switch (pin number)
{
case i:
RTSI_Trig_i_Pin_Dir = 0 (input) or 1 (output);
RTSI_Trig_i_Output_Select = 0 (ADR_START1) or 1
(ADR_START2) or 2 (SCLKG) or 3 (DACUPDN) or 4
(DA_START1) or 5 (G_SRC 0) or 6 (G_GATE 0) or 7 (RGOUT0) or
8 through 11 (RTSI_BRD<0..3>);
}
case RTSI Board:
switch (pin number)
{
case i:
RTSI_Board_i_Pin_Dir = 0 (input) or 1 (output);
RTSI_Board_i_Output_Select = 0 through 6
(RTSI_TRIGGER<0..6>) or 7 (AI STOP);
}
case RTSI Subselection:
switch (pin number)
{
case 1:
RTSI_Sub_Selection_1 = 0 (general purpose counter 0 TC) or
1 (same as G_OUT/RTSI_IO pin);
break;
}
}
}
6.4.2 Bitfield Descriptions
Bits in the register bit maps are organized into bitfields. A bitfield can contain one or more
bits. Only bits with contiguous locations within a register can belong to a bitfield. The high
and low pairs of load and save registers for 24-bit counters are also treated as bitfields. The
RTSI trigger-related bitfields are described below. Not all bitfields referred to in section
, are listed here. To locate a particular bitfield description within
this manual, refer to Appendix B,
.
