Chapter 8
Interrupt Control
©
National Instruments Corporation
8-5
DAQ-STC Technical Reference Manual
Use the following function to enable the use of an external secondary interrupt condition on
pins IRQ_IN<0..1>.
Function
MSC_Pass_Through_Second_Irq
{
switch (pass through secondary interrupt)
{
case 0:
Pass_Thru_0_Second_Irq_Enable = 0 (disabled) or 1 (enabled);
break;
case 1:
Pass_Thru_1_Second_Irq_Enable = 0 (disabled) or 1 (enabled);
break;
}
}
Note
You should set Pass_Through_i_Interrupt_Enable to 1 after selecting the
interrupt polarity.
8.4.2 Interrupt Handling
Up to 18 events occurring within the DAQ-STC and up to two events occurring outside the
DAQ-STC can cause the DAQ-STC to assert an interrupt. This section presents a
programming sequence you can use to determine which of the many conditions caused the
interrupt. You will find suggestions for interrupt-servicing programs in the other chapters of
this manual.
Keep a record of interrupts that you enable so that you can determine which condition caused
the interrupt. You should have software copies of all the relevant write-only registers. It is
assumed that you want to service every condition that can cause an interrupt.
For instructions on programming the physical interrupt interface circuitry, see section
Programming the Interrupt Interface
. For information on how your system uses the
DAQ-STC interrupts, consult your hardware and computer manuals.
Conditions that can cause interrupts are divided into group A and group B. Group A contains
conditions generated by or related to analog input control and timing circuitry,
general-purpose counter 0, and pass-through interrupt 0. Group B contains conditions
generated by or related to analog output control and timing circuitry, general-purpose counter
1, and pass-through interrupt 1. You can enable the two groups independently, and you can
choose any of the eight interrupt levels for each group, or the two groups can share an interrupt
level.
The following sections present the functions that should be executed when an appropriate
interrupt is asserted.
