Chapter 2
Analog Input Timing/Control
DAQ-STC Technical Reference Manual
2-30
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National Instruments Corporation
}
}
Else
{
AI_External_MUX_Present = 0;
AI_EXTMUX_CLK_Output_Select = 0 (high Z) or 1 (forced to logic low);
/*Base selection on board hardware*/
∑
AI_Configuration_End = 1;
End critical section;
}
If AI_External_MUX_Present is set to 1, you should use the DIV counter to account for the
external-to-internal multiplexing factor. In this case, you cannot use the DIV counter to
generate the STOP trigger.
2.6.3.5 FIFO Request
Use this function to select the data FIFO condition on which interrupt or DMA requests will
be generated.
Function
FIFO_Request_Selection
{
Begin critical section;
AI_Configuration_Start = 1;
∑
AI_FIFO_Mode = 0 (FIFO not empty) or 1 (FIFO half-full) or 2 (FIFO full) or
3 (FIFO half-full until FIFO empty);
∑
AI_Configuration_End = 1;
End critical section;
}
2.6.3.6 Hardware Gate Programming
Use this function to enable or disable hardware and software gating. If you enable hardware
gating, you also select the signal that controls the gate, the gate polarity, and the gating mode.
Function
AI_Hardware_Gating
{
Begin critical section;
∑
AI_Configuration_Start = 1;
If (external gating is desired) then
{
