LAPIS Semiconductor ML610421, User Manual, Page: 9 / 437

ML610Q421/ML610Q422/ML610421 User’s Manual
Contents
Contents – 5
12.1.2 Configuration .................................................................................................................................... 12-1
12.2 Description of Registers ............................................................................................................................ 12-2
12.2.1 List of Registers ................................................................................................................................ 12-2
12.2.2 Watchdog Timer Control Register (WDTCON) ............................................................................... 12-3
12.2.3 Watchdog Timer Mode Register (WDTMOD) ................................................................................. 12-4
12.3 Description of Operation........................................................................................................................... 12-5
12.3.1 Handling example when you do not want to use the watch dog timer .............................................. 12-7
Chapter 13
13. Synchronous Serial Port ................................................................................................................................ 13-1
13.1 Overview................................................................................................................................................... 13-1
13.1.1 Features ............................................................................................................................................. 13-1
13.1.2 Configuration .................................................................................................................................... 13-1
13.1.3 List of Pins ........................................................................................................................................ 13-2
13.2 Description of Registers ............................................................................................................................ 13-3
13.2.1 List of Registers ................................................................................................................................ 13-3
13.2.2 Serial Port Transmit/Receive Buffers (SIO0BUFL, SIO0BUFH) .................................................... 13-4
13.2.3 Serial Port Control Register (SIO0CON) .......................................................................................... 13-5
13.2.4 Serial Port Mode Register 0 (SIO0MOD0) ....................................................................................... 13-6
13.2.5 Serial Port Mode Register 1 (SIO0MOD1) ....................................................................................... 13-7
13.3 Description of Operation........................................................................................................................... 13-8
13.3.1 Transmit Operation ........................................................................................................................... 13-8
13.3.2 Receive Operation ............................................................................................................................. 13-9
13.3.3 Transmit/Receive Operation ........................................................................................................... 13-10
13.4 Specifying port registers ......................................................................................................................... 13-11
13.4.1 Functioning P42 (SOUT0), P41 (SCK0) and P40 (SIN0) as the SSIO/ “Master mode” ................ 13-11
13.4.2 Functioning P42 (SOUT0), P41 (SCK0) and P40 (SIN0) as the SSIO/ ”Slave mode” ................... 13-12
13.4.3 Functioning P46 (SOUT0), P45 (SCK0) and P44 (SIN0) as the SSIO/ ”Master mode” ................ 13-13
13.4.4 Functioning P46 (SOUT0), P45 (SCK0) and P44 (SIN0) as the SSIO/ ”Slave mode” ................... 13-14
Chapter 14
14. UART ........................................................................................................................................................... 14-1
14.1 Overview................................................................................................................................................... 14-1
14.1.1 Features ............................................................................................................................................. 14-1
14.1.2 Configuration .................................................................................................................................... 14-1
14.1.3 List of Pins ........................................................................................................................................ 14-1
14.2 Description of Registers ............................................................................................................................ 14-2
14.2.1 List of Registers ................................................................................................................................ 14-2
14.2.2 UART0 Transmit/Receive Buffer (UA0BUF) .................................................................................. 14-3
14.2.3 UART0 Control Register (UA0CON) .............................................................................................. 14-4
14.2.4 UART0 Mode Register 0 (UA0MOD0) ........................................................................................... 14-5
14.2.5 UART0 Mode Register 1 (UA0MOD1) ........................................................................................... 14-6
14.2.6 UART0 Baud Rate Registers L, H (UA0BRTL, UA0BRTH) .......................................................... 14-8
14.2.7 UART0 Status Register (UA0STAT) ............................................................................................... 14-9
14.3 Description of Operation......................................................................................................................... 14-11
14.3.1 Transfer Data Format ...................................................................................................................... 14-11
14.3.2 Baud Rate ........................................................................................................................................ 14-12
14.3.3 Transmit Data Direction ................................................................................................................. 14-13
14.3.4 Transmit Operation ......................................................................................................................... 14-14
14.3.5 Receive Operation ........................................................................................................................... 14-16
14.4 Specifying port registers ......................................................................................................................... 14-18
14.4.1 Functioning P43(TXD0) and P42(RXD0) as the UART ................................................................ 14-18
14.4.2 Functioning P43(TXD0) and P02(RXD0) as the UART ................................................................ 14-19