
ML610Q421/ML610Q422/ML610421 User’s Manual
Chapter 21 Port 4
21 – 6
21.2.4
Port 4 Control Registers
0, 1 (P4CON0, P4CON1)
Address: 0F222H
Access: R/W
Access size: 8/16 bits
Initial value: 00H
7
6
5
4
3
2
1
0
P4CON0
P47C0
P46C0
P45C0
P44C0
P43C0
P42C0
P41C0
P40C0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Initial value
0
0
0
0
0
0
0
0
Address: 0F223H
Access: R/W
Access size: 8 bits
Initial value: 00H
7
6
5
4
3
2
1
0
P4CON1
P47C1
P46C1
P45C1
P44C1
P43C1
P42C1
P41C1
P40C1
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Initial value
0
0
0
0
0
0
0
0
P4CON0 and P4CON1 are special function registers (SFRs) to select input/output state of the Port 4 pin. The
input/output state is different between input mode and output mode. Input or output is selected by using the P4DIR
register.
[Description of Bits]
•
P47C1-P40C1, P47C0-P40C0
(bits 7-0)
The P47C1 to P40C1 pins and the P47C0 to P40C0 pins are used to select high-impedance output, P-channel open
drain output, N-channel open drain output, or CMOS output in output mode and to select high-impedance input, input
with a pull-down resistor, or input with a pull-up resistor in input mode.
Setting of P47 pin
When output mode is selected
(P47DIR bit = “0”)
When input mode is selected
(P47DIR bit = “1”)
P47C1
P47C0
Description
0
0
High-impedance output (initial value)
High-impedance input
0
1
P-channel open drain output
Input with a pull-down resistor
1
0
N-channel open drain output
Input with a pull-up resistor
1
1
CMOS output
High-impedance input
Setting of P46 pin
When output mode is selected
(P46DIR bit = “0”)
When input mode is selected
(P46DIR bit = “1”)
P46C1
P46C0
Description
0
0
High-impedance output (initial value)
High-impedance input
0
1
P-channel open drain output
Input with a pull-down resistor
1
0
N-channel open drain output
Input with a pull-up resistor
1
1
CMOS output
High-impedance input
Setting of P45 pin
When output mode is selected
(P45DIR bit = “0”)
When input mode is selected
(P45DIR bit = “1”)
P45C1
P45C0
Description
0
0
High-impedance output (initial value)
High-impedance input
0
1
P-channel open drain output
Input with a pull-down resistor
1
0
N-channel open drain output
Input with a pull-up resistor
1
1
CMOS output
High-impedance input
Summary of Contents for ML610421
Page 1: ...ML610Q421 ML610Q422 ML610421 User s Manual Issue Date Feb 9 2015 FEUL610Q421 06...
Page 15: ...Chapter 1 Overview...
Page 44: ...Chapter 2 CPU and Memory Space...
Page 49: ...Chapter 3 Reset Function...
Page 53: ...Chapter 4 MCU Control Function...
Page 69: ...Chapter 5 Interrupts INTs...
Page 93: ...Chapter 6 Clock Generation Circuit...
Page 110: ...Chapter 7 Time Base Counter...
Page 121: ...Chapter 8 Capture...
Page 129: ...Chapter 9 1 kHz Timer 1kHzTM...
Page 135: ...Chapter 10 Timers...
Page 160: ...Chapter 11 PWM...
Page 172: ...Chapter 12 Watchdog Timer...
Page 180: ...Chapter 13 Synchronous Serial Port...
Page 195: ...Chapter 14 UART...
Page 216: ...Chapter 15 I2 C Bus Interface...
Page 231: ...Chapter 16 NMI Pin...
Page 237: ...Chapter 17 Port 0...
Page 246: ...Chapter 18 Port 1...
Page 252: ...Chapter 19 Port 2...
Page 259: ...Chapter 20 Port 3...
Page 270: ...Chapter 21 Port 4...
Page 282: ...Chapter 22 Port A...
Page 290: ...Chapter 23 Melody Driver...
Page 304: ...Chapter 24 RC Oscillation Type A D Converter...
Page 327: ...Chapter 25 Successive Approximation Type A D Converter...
Page 338: ...Chapter 26 LCD Drivers...
Page 371: ...Chapter 27 Battery Level Detector...
Page 378: ...Chapter 28 Power Supply Circuit...
Page 381: ...Chapter 29 On Chip Debug Function...
Page 384: ...Appendixes...
Page 435: ...Revision History...