LAPIS Semiconductor ML610421, User Manual, Page: 253 / 437

ML610Q421/ML610Q422/ML610421 User’s Manual
Chapter 19 Port 2
19 – 1
19. Port 2
19.1 Overview
This LSI includes 3-bit Port 2 (P20 to P22) dedicated to output.
Port 2 can output low-speed clock (LSCLK), high-speed output clock (OUTCLK), and melody as a secondary function.
For clock output and melody 0 (MD0) output, see Chapter 6, “Clock Generation Circuit” and Chapter 23, “Melody
Driver”, respectively.
19.1.1 Features
•
Allows direct LED drive.
•
Allows selection of high-impedance output mode, P-channel open drain output mode, N-channel open drain output
mode, or CMOS output mode for each bit.
•
Allows output of low-speed clock (LSCLK), high-speed clock (OUTCLK), or melody 0 (MD0) as a secondary
function.
19.1.2 Configuration
Figure 19-1 shows the configuration of Port 2.
P2D : Port 2 data register
P2CON0 : Port 2 control register 0
P2CON1 : Port 2 control register 1
P2MOD : Port 2 mode register
Figure 19-1 Configuration of Port 2
19.1.3 List of Pins
Pin name I/O Primary function Secondary function
P20/LED0/LSCLK O Output port, Direct LED drive Low-speed clock output (LSCLK)
P21/LED1/OUTCLK O Output port, Direct LED drive High-speed clock output (OUTCLK)
P22/LED2/MD0 O Output port, Direct LED drive Melody 0 output (MD0)
Data bus
LSCLK
OUTCLK
MD0
P20 to P22
P2MOD
P2CON0
P2CON1
V
DD
V
DD
V
SS
V
SS
3
3
Port2
Output
Controller
P2D