LAPIS Semiconductor ML610421, User Manual, Page: 230 / 437

ML610Q421/ML610Q422/ML610421 User’s Manual
Chapter 15 I
2
C Bus Interface
15 – 14
15.4 Specifying port registers
When you want to make sure the I2C bus interface function is working, please check related port registers are
specified. See Chapter 21, “Port 4” for detail about the port registers.
15.4.1 Functioning P41(SCL) and P40(SDA) as the I2C
Set P41MD1-P40MD1 bits(bit1-bit0 of P4MOD1 register) to “0” and set P41MD0-P40MD0(bit1-bit0 of P4MOD0
register) to “1”, for specifying the I2C as the secondary function of P41 and P40.
Reg. name P4MOD1 register (Address: 0F225H)
Bit 7 6 5 4 3 2 1 0
Bit name
P47MD1 P46MD1 P45MD1 P44MD1 P43MD1 P42MD1 P41MD1 P40MD1
Data * * * * * * 0 0
Reg. name P4MOD0 register (Address: 0F224H)
Bit 7 6 5 4 3 2 1 0
Bit name
P47MD0 P46MD0 P45MD0 P44MD0 P43MD0 P42MD0 P41MD0 P40MD0
Data * * * * * * 1 1
Set P41C1-P40C1 bit(bit1-0 of P4CON1 register) to “1”, set P41C0-P40C0 bit(bit1-0 of P4CON0 register) to “0”, and
set P41DIR-P40DIR bit(bit1-0 of P4DIR register) to “0”, for specifying the P41 and P40 as Nch open-drain output. The
open-drain/open-collector outputs are required on the I2C bus line to avoid collision between H level and L level.
Reg. name P4CON1 register (Address: 0F223H)
Bit 7 6 5 4 3 2 1 0
Bit name
P47C1 P46C1 P45C1 P44C1 P43C1 P42C1 P41C1 P40C1
Data * * * * * * 1 1
Reg. name P4CON0 register (Address: 0F222H)
Bit 7 6 5 4 3 2 1 0
Bit name
P47C0 P46C0 P45C0 P44C0 P43C0 P42C0 P41C0 P40C0
Data * * * * * * 0 0
Reg. name P4DIR register (Address: 0F221H)
Bit 7 6 5 4 3 2 1 0
Bit name
P47DIR P46DIR P45DIR P44DIR P43DIR P42DIR P41DIR P40DIR
Data * * * * * * 0 0
Data of P41D-P40D bits (bit1-0 of P4D register) do not affect to the I2C function, so don’t care the data for the
function.
Reg. name P4D register (Address: 0F220H)
Bit 7 6 5 4 3 2 1 0
Bit name
P47D P46D P45D P44D P43D P42D P41D P40D
Data * * * * * * ** **
* : Bit not related to the I2C bus interface function
** : Don’t care the data