LAPIS Semiconductor ML610421, User Manual, Page: 163 / 437

ML610Q421/ML610Q422/ML610421 User’s Manual
Chapter 11 PWM
11 – 3
11.2.2 PWM0 Period Registers (PW0PL, PW0PH)
Address: 0F0A0H
Access: R/W
Access size: 8 bits
Initial value: 0FFH
7 6 5 4 3 2 1 0
PW0PL P0P7 P0P6 P0P5 P0P4 P0P3 P0P2 P0P1 P0P0
R/W R/W R/W R/W R/W R/W R/W R/W R/W
At reset 1 1 1 1 1 1 1 1
Address: 0F0A1H
Access: R/W
Access size: 8 bits
Initial value: 0FFH
7 6 5 4 3 2 1 0
PW0PH P0P15 P0P14 P0P13 P0P12 P0P11 P0P10 P0P9 P0P8
R/W R/W R/W R/W R/W R/W R/W R/W R/W
At reset 1 1 1 1 1 1 1 1
PW0PH and PW0PL are special function registers (SFRs) to set the PWM0 periods.
Note:
When PW0PH or PW0PL is set to “0000H”, the PWM0 period buffer (PW0PBUF) is set to “0001H”.