LAPIS Semiconductor ML610421, User Manual, Page: 61 / 437

ML610Q421/ML610Q422/ML610421 User’s Manual
Chapter 4 MCU Control Function
4 – 8
4.2.7 Block Control Register 3(BLKCON3)
Address: 0F02BH
Access: R/W
Access size: 8 bits
Initial value: 00H
7 6 5 4 3 2 1 0
BLKCON3
― ― ― ― ― ― ―
DMD0
R/W R/W R/W R/W R/W R/W R/W R/W R/W
Initial value 0 0 0 0 0 0 0 0
BLKCON3 is a special function register (SFR) to make even more reducing current consumption by turning unused
peripherals off.
[Description of Bits]
•
DMD0 (bit 0)
The DMD0 bit is used to control Melody/Buzzer operation. When the DMD0 bit is set to “1”, the circuits related to
Melody/Buzzer are reset and turned off.
DMD0 Description
0 Enable operating Melody/Buzzer (initial value)
1 Disable operating Melody/Buzzer
Note:
When certain bits of block control registers are set to “1”, corresponding peripherals are reset (all registers are reset) and
operating clocks for the peripherals stop. Writing to every SFR (special function register) in the corresponding
peripherals is not valid while the bits of block control registers are set to “1” and returns the initial value for read.
Ensure the bits are reset to “0” before using the peripherals to enable the operation.
See Chapter 23, “Melody Driver” for detail about operation of Melody/Buzzer.