LAPIS Semiconductor ML610421, User Manual, Page: 274 / 437

ML610Q421/ML610Q422/ML610421 User’s Manual
Chapter 21 Port 4
21 – 4
21.2.2 Port 4 Data Register (P4D)
Address: 0F220H
Access: R/W
Access size: 8 bits
Initial value: 00H
7 6 5 4 3 2 1 0
P4D P47D P46D P45D P44D P43D P42D P41D P40D
R/W R/W R/W R/W R/W R/W R/W R/W R/W
Initial value 0 0 0 0 0 0 0 0
P4D is a special function register (SFR) to set the value to be output to the Port 4 pin or to read the input level of the
Port 4. In output mode, the value of this register is output to the Port 4 pin. The value written to P4D is readable.
In input mode, the input level of the Port 4 pin is read when P4D is read. Output mode or input mode is selected by
using the port direction register (P4DIR) described later.
[Description of Bits]
•
P47D-P40D (bits 7-0)
The P47D to P40D bits are used to set the output value of the Port 4 pin in output mode and to read the pin level of
the Port 4 pin in input mode.
P47D Description
0 Output or input level of the P47 pin: ”L”
1 Output or input level of the P47 pin: ”H”
P46D Description
0 Output or input level of the P46 pin: ”L”
1 Output or input level of the P46 pin: ”H”
P45D Description
0 Output or input level of the P45 pin: ”L”
1 Output or input level of the P45 pin: ”H”
P44D Description
0 Output or input level of the P44 pin: ”L”
1 Output or input level of the P44 pin: ”H”
P43D Description
0 Output or input level of the P43 pin: ”L”
1 Output or input level of the P43 pin: ”H”
P42D Description
0 Output or input level of the P42 pin: ”L”
1 Output or input level of the P42 pin: ”H”
P41D Description
0 Output or input level of the P41 pin: ”L”
1 Output or input level of the P41 pin: ”H”
P40D Description
0 Output or input level of the P40 pin: ”L”
1 Output or input level of the P40 pin: ”H”