LAPIS Semiconductor ML610421, User Manual, Page: 204 / 437

ML610Q421/ML610Q422/ML610421 User’s Manual
Chapter 14 UART
14 – 9
14.2.7 UART0 Status Register (UA0STAT)
Address: 0F296H
Access: R/W
Access size: 8 bits
Initial value: 00H
7 6 5 4 3 2 1 0
UA0STAT — — — — U0FUL U0PER U0OER U0FER
R/W R/W R/W R/W R/W R/W R/W R/W R/W
Initial value 0 0 0 0 0 0 0 0
UA0STAT is a special function register (SFR) to indicate the state of transmit or receive operation of the UART.
When any data is written to UA0STAT, all the flags are initialized to “0”.
[Description of Bits]
•
U0FER (bit 0)
The U0FER bit is used to indicate occurrence of a framing error of the UART.
When an error occurs in the start or stop bit, the U0FER bit is set to “1”. This bit is updated each time reception is
completed.
The U0FER bit is fixed to “0” in transmit mode.
U0FER Description
0
No framing error (initial value)
1
Framing error
•
U0OER (bit 1)
The U0OER bit is used to indicate occurrence of an overrun error of the UART.
If the received data in the transmit/receive buffer (UA0BUF) is received again before it is read, this bit is set to “1”.
Even if reception is stopped by the U0EN bit and then reception is restarted, this bit is set to “1” unless the previous
receive data is not read. Therefore, make sure that data is always read from the transmit/receive buffer even if the
data is not required.
The U0OER bit is fixed to “0” in transmit mode.
U0OER Description
0 No overrun error (initial value)
1 Overrun error
•
U0PER (bit 2)
The U0PER bit is used to indicate occurrence of a parity error of the UART.
When the parity of the received data and the parity bit attached to the data do not coincide, this bit is set to “1”.
U0PER is updated whenever data is received.
The U0PER bit is fixed to “0” in transmit mode.
U0PER Description
0 No parity error (initial value)
1 Parity error