LAPIS Semiconductor ML610421, User Manual, Page: 358 / 437

ML610Q421/ML610Q422/ML610421 User’s Manual
Chapter 26 LCD Drivers
26 – 20
26.2.9 Display Registers (DSPR00 to DSPR71)
Address: 0F100H to 0F171H
Access: R/W
Access size: 8 bits
Initial value: Undefined
7 6 5 4 3 2 1 0
DSPRxx c15/7 c14/6 c13/5 c12/4 c11/3 c10/2 c9/1 c8/0
R/W R/W R/W R/W R/W R/W R/W R/W R/W
Initial value x x x x x x x x
DSPRxx (xx = 00 to 71) are special function registers (SFRs) to store display data.
Each valid bit of DSPRxx becomes undefined at system reset.
The display registers that are not used for LCD display can be used for data memories.
Set data in DSPRxx before setting LCD display mode.
Tables 26-4 to 26-6 list display registers segment map type 2 to type 3 respectively. The type can be selected by the
DADM1 and DADM0 bits of the display mode register 1 (DSPMOD1).
[Description of Bits]
•
c15-c0 (bits 7-0)
The c15 to c0 bits are used to set display data.
C15 to c0 Description
0
off waveform
1
on waveform