LAPIS Semiconductor ML610421, User Manual, Page: 258 / 437

ML610Q421/ML610Q422/ML610421 User’s Manual
Chapter 19 Port 2
19 – 6
19.3 Description of Operation
19.3.1 Output Port Function
For each pin of Port 2, any one of high-impedance output mode, P-channel open drain output mode, N-channel open
drain output mode, and CMOS output mode can be selected by setting the Port 2 control registers 0 and 1 (P2CON0 and
P2CON1). At a system reset, high-impedance output mode is selected as the initial state.
Depending of the value set in the Port 2 data register (P2D), a “L” level or “H” level signal is output to each pin of Port
2.
19.3.2 Secondary Function
Low-speed clock (LSCLK) output, High-speed output clock (OUTCLK) output, or melody 0 (MD0) output is assigned
to Port 2 as a secondary function. The secondary function can be used by setting the P22MD to P20MD bits of the
Port 2 mode register (P2MOD) to “1”.